linux-kernel - Re: [PATCH v2 01/23] arm64: cpufeature: Add cpucap for HPMN0

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Message-ID: <aFpThZIE2PxjVAVw@linux.dev>
Date: Tue, 24 Jun 2025 00:28:05 -0700
From: Oliver Upton <oliver.upton@...ux.dev>
To: Colton Lewis <coltonlewis@...gle.com>
Cc: kvm@...r.kernel.org, pbonzini@...hat.com, corbet@....net,
	linux@...linux.org.uk, catalin.marinas@....com, will@...nel.org,
	maz@...nel.org, joey.gouly@....com, suzuki.poulose@....com,
	yuzenghui@...wei.com, mark.rutland@....com, shuah@...nel.org,
	linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, kvmarm@...ts.linux.dev,
	linux-perf-users@...r.kernel.org, linux-kselftest@...r.kernel.org
Subject: Re: [PATCH v2 01/23] arm64: cpufeature: Add cpucap for HPMN0

On Mon, Jun 23, 2025 at 06:25:38PM +0000, Colton Lewis wrote:
> Oliver Upton <oliver.upton@...ux.dev> writes:
> 
> > On Fri, Jun 20, 2025 at 10:13:01PM +0000, Colton Lewis wrote:
> > > Add a capability for FEAT_HPMN0, whether MDCR_EL2.HPMN can specify 0
> > > counters reserved for the guest.
> 
> > > This required changing HPMN0 to an UnsignedEnum in tools/sysreg
> > > because otherwise not all the appropriate macros are generated to add
> > > it to arm64_cpu_capabilities_arm64_features.
> 
> > > Signed-off-by: Colton Lewis <coltonlewis@...gle.com>
> > > ---
> > >   arch/arm64/kernel/cpufeature.c | 8 ++++++++
> > >   arch/arm64/tools/cpucaps       | 1 +
> > >   arch/arm64/tools/sysreg        | 6 +++---
> > >   3 files changed, 12 insertions(+), 3 deletions(-)
> 
> > > diff --git a/arch/arm64/kernel/cpufeature.c
> > > b/arch/arm64/kernel/cpufeature.c
> > > index b34044e20128..278294fdc97d 100644
> > > --- a/arch/arm64/kernel/cpufeature.c
> > > +++ b/arch/arm64/kernel/cpufeature.c
> > > @@ -548,6 +548,7 @@ static const struct arm64_ftr_bits ftr_id_mmfr0[] = {
> > >   };
> 
> > >   static const struct arm64_ftr_bits ftr_id_aa64dfr0[] = {
> > > +	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE,
> > > ID_AA64DFR0_EL1_HPMN0_SHIFT, 4, 0),
> > >   	S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE,
> > > ID_AA64DFR0_EL1_DoubleLock_SHIFT, 4, 0),
> > >   	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE,
> > > ID_AA64DFR0_EL1_PMSVer_SHIFT, 4, 0),
> > >   	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE,
> > > ID_AA64DFR0_EL1_CTX_CMPs_SHIFT, 4, 0),
> > > @@ -2896,6 +2897,13 @@ static const struct arm64_cpu_capabilities
> > > arm64_features[] = {
> > >   		.matches = has_cpuid_feature,
> > >   		ARM64_CPUID_FIELDS(ID_AA64MMFR0_EL1, FGT, FGT2)
> > >   	},
> > > +	{
> > > +		.desc = "Allow MDCR_EL2.HPMN = 0",
> 
> > This feedback still stands...
> 
> > 		.desc = "HPMN0",
> 
> > [*] https://lore.kernel.org/kvm/aD4ijUaSGm9b2g5H@linux.dev/
> 
> Sorry for ignoring your previous feedback. I looked at the other .desc
> fields and they had more descriptive English, so I think this one should
> be more than "FEAT_HPMN0" for consistency.
> 
> If you insist I'll change it.

I'm not exactly sold on the merits of using descriptive names for the
capabilities, as the architecture extension names are exact terms that
can be related back to documentation.

Thanks,
Oliver