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Message-ID: <nhsqnvfrz5s2635zm33nvhehcxoqowh7kipnh6e2wlvjdbxee2@6yd43t7kariv>
Date: Tue, 24 Jun 2025 09:42:43 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Yao Zi <ziyao@...root.org>
Cc: Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Heiko Stuebner <heiko@...ech.de>, Frank Wang <frank.wang@...k-chips.com>,
Andy Yan <andy.yan@...k-chips.com>, Cristian Ciocaltea <cristian.ciocaltea@...labora.com>,
Detlev Casanova <detlev.casanova@...labora.com>, Shresth Prasad <shresthprasad7@...il.com>,
Chukun Pan <amadeus@....edu.cn>, Jonas Karlman <jonas@...boo.se>, linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 2/6] dt-bindings: phy: rockchip: naneng-combphy: Add
power-domains property
On Tue, Jun 24, 2025 at 03:37:29AM +0000, Yao Zi wrote:
> Though isn't described in existing devicetrees, most Rockchip combphys
> belong to a specific power-domain of the SoC. Taking RK3588 as example,
> combphy 0 and combphy 2 belong to the PD_BUS domain. Document the
> power-domains property to allow describing the information correctly
> in devicetree.
>
> Signed-off-by: Yao Zi <ziyao@...root.org>
> ---
> .../devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml | 3 +++
> 1 file changed, 3 insertions(+)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Best regards,
Krzysztof
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