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Message-ID: <20250624090923.5521a0f2@pumpkin>
Date: Tue, 24 Jun 2025 09:09:23 +0100
From: David Laight <david.laight.linux@...il.com>
To: Palmer Dabbelt <palmer@...belt.com>
Cc: rkrcmar@...tanamicro.com, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org, Paul Walmsley <paul.walmsley@...ive.com>,
aou@...s.berkeley.edu, Alexandre Ghiti <alex@...ti.fr>, Atish Patra
<atishp@...osinc.com>, ajones@...tanamicro.com, cleger@...osinc.com,
apatel@...tanamicro.com, thomas.weissschuh@...utronix.de
Subject: Re: [PATCH v2 0/2] RISC-V: turn sbi_ecall into a variadic macro
On Mon, 23 Jun 2025 15:53:58 -0700 (PDT)
Palmer Dabbelt <palmer@...belt.com> wrote:
> On Thu, 19 Jun 2025 12:03:12 PDT (-0700), rkrcmar@...tanamicro.com wrote:
> > v2 has a completely rewritten [1/2], and fixes some missed trailing
> > zeroes in [2/2]. The fixes in [2/2] are important for v2, because
> > sbi_ecall doesn't fill the registers with zeroes anymore.
>
> The SBI spec says "Registers that are not defined in the SBI function
> call are not reserved." and I'm not really sure what to make of that.
> Specifically: does that mean implementations are allowed to ascribe
> custom meaning to those parameters and might start doing stuff if
> they're not set to zero?
Or does it mean they aren't guaranteed to be preserved?
David
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