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Message-ID: <3099e624-4cfb-4582-94be-3c09a9fcba01@nvidia.com>
Date: Tue, 24 Jun 2025 11:06:49 +0100
From: Jon Hunter <jonathanh@...dia.com>
To: Arnd Bergmann <arnd@...nel.org>,
 Daniel Lezcano <daniel.lezcano@...aro.org>,
 Thomas Gleixner <tglx@...utronix.de>,
 Thierry Reding <thierry.reding@...il.com>, Pohsun Su <pohsuns@...dia.com>,
 Robert Lin <robelin@...dia.com>, Guenter Roeck <linux@...ck-us.net>
Cc: Arnd Bergmann <arnd@...db.de>, linux-kernel@...r.kernel.org,
 linux-tegra@...r.kernel.org
Subject: Re: [PATCH] clocksource: tegra186: avoid 64-bit division


On 20/06/2025 12:19, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@...db.de>
> 
> The newly added function causes a build failure on 32-bit targets with
> older compiler version such as gcc-10:
> 
> arm-linux-gnueabi-ld: drivers/clocksource/timer-tegra186.o: in function `tegra186_wdt_get_timeleft':
> timer-tegra186.c:(.text+0x3c2): undefined reference to `__aeabi_uldivmod'
> 
> The calculation can trivially be changed to avoid the division entirely,
> as USEC_PER_SEC is a multiple of 5. Change both such calculation for
> consistency, even though gcc apparently managed to optimize the other one
> properly already.
> 
> Fixes: 28c842c8b0f5 ("clocksource/drivers/timer-tegra186: Add WDIOC_GETTIMELEFT support")
> Signed-off-by: Arnd Bergmann <arnd@...db.de>
> ---
>   drivers/clocksource/timer-tegra186.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clocksource/timer-tegra186.c b/drivers/clocksource/timer-tegra186.c
> index e5394f98a02e..bd3d443e41cd 100644
> --- a/drivers/clocksource/timer-tegra186.c
> +++ b/drivers/clocksource/timer-tegra186.c
> @@ -159,7 +159,7 @@ static void tegra186_wdt_enable(struct tegra186_wdt *wdt)
>   	tmr_writel(wdt->tmr, TMRCSSR_SRC_USEC, TMRCSSR);
>   
>   	/* configure timer (system reset happens on the fifth expiration) */
> -	value = TMRCR_PTV(wdt->base.timeout * USEC_PER_SEC / 5) |
> +	value = TMRCR_PTV(wdt->base.timeout * (USEC_PER_SEC / 5)) |
>   		TMRCR_PERIODIC | TMRCR_ENABLE;
>   	tmr_writel(wdt->tmr, value, TMRCR);
>   
> @@ -267,7 +267,7 @@ static unsigned int tegra186_wdt_get_timeleft(struct watchdog_device *wdd)
>   	 * counter value to the time of the counter expirations that
>   	 * remain.
>   	 */
> -	timeleft += (((u64)wdt->base.timeout * USEC_PER_SEC) / 5) * (4 - expiration);
> +	timeleft += (u64)wdt->base.timeout * (USEC_PER_SEC / 5) * (4 - expiration);
>   
>   	/*
>   	 * Convert the current counter value to seconds,


Guenter has also posted a fix for this here [0].

Jon

[0] 
https://lore.kernel.org/linux-tegra/75496de8-51fd-4e27-9f92-babaa0e22c14@nvidia.com/T/#me403a7afd04bbf24e29d3880123a4faa656eab05
-- 
nvpublic


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