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Message-ID: <20250625054114.28273-1-shubhrajyoti.datta@amd.com>
Date: Wed, 25 Jun 2025 11:11:14 +0530
From: Shubhrajyoti Datta <shubhrajyoti.datta@....com>
To: <linux-clk@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: <git@....com>, Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Michal Simek <michal.simek@....com>, Shubhrajyoti Datta
<shubhrajyoti.datta@....com>
Subject: [PATCH] clk: clocking-wizard: Fix the round rate handling for versal
Fix the `clk_round_rate` implementation for Versal platforms by calling
the Versal-specific divider calculation helper. The existing code used
the generic divider routine, which results in incorrect round rate.
Fixes: 7681f64e6404 ("clk: clocking-wizard: calculate dividers fractional parts")
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@....com>
---
drivers/clk/xilinx/clk-xlnx-clock-wizard.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c
index 9a35031b0afd..3efce7b88906 100644
--- a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c
+++ b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c
@@ -673,7 +673,7 @@ static long clk_wzrd_ver_round_rate_all(struct clk_hw *hw, unsigned long rate,
u32 m, d, o, div, f;
int err;
- err = clk_wzrd_get_divisors(hw, rate, *prate);
+ err = clk_wzrd_get_divisors_ver(hw, rate, *prate);
if (err)
return err;
--
2.17.1
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