linux-kernel - Re: [PATCH v3 5/7] arm64: dts: axiado: Add initial support for AX3000 SoC and eval board

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Message-ID: <a0feb67f-3a73-4247-8383-7255616cb22b@kernel.org>
Date: Wed, 25 Jun 2025 08:05:52 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Harshit Shah <hshah@...ado.com>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Linus Walleij <linus.walleij@...aro.org>,
 Bartosz Golaszewski <brgl@...ev.pl>, Arnd Bergmann <arnd@...db.de>,
 Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>,
 Jan Kotas <jank@...ence.com>
Cc: "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
 "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
 "linux-arm-kernel@...ts.infradead.org"
 <linux-arm-kernel@...ts.infradead.org>,
 "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
 "soc@...ts.linux.dev" <soc@...ts.linux.dev>
Subject: Re: [PATCH v3 5/7] arm64: dts: axiado: Add initial support for AX3000
 SoC and eval board

On 25/06/2025 04:16, Harshit Shah wrote:
> Thank you for the reviews. I have some questions/feedback to clarify 
> before I fix some of them.
> 
> On 6/23/2025 11:45 PM, Krzysztof Kozlowski wrote:
>>
>> On 23/06/2025 19:28, Harshit Shah wrote:
>>> +                     clocks = <&refclk>;
>>> +                     interrupt-parent = <&gic500>;
>>> +                     interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
>>> +                     gpio-controller;
>>> +                     #gpio-cells = <2>;
>>> +                     interrupt-controller;
>>> +                     #interrupt-cells = <2>;
>>> +                     status = "disabled";
>>> +             };
>> Please follow DTS coding style.
> 
> Sorry, I didn't got this comment. Is this for the spaces between the 
> nodes or something else?
> 
> The current GPIO node is as follows:

There is always, always line break between nodes.

> 
> gpio0: gpio-controller@...00000 {
>                          compatible = "cdns,gpio-r1p02";
>                          reg = <0x00 0x80500000 0x00 0x400>;
>                          clocks = <&refclk>;
>                          interrupt-parent = <&gic500>;
>                          interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
>                          gpio-controller;
>                          #gpio-cells = <2>;
>                          interrupt-controller;
>                          #interrupt-cells = <2>;
>                          status = "disabled";
>                  };
> 
> I checked the document: 
> https://elixir.bootlin.com/linux/v6.15/source/Documentation/devicetree/bindings/dts-coding-style.rst#L112.
> 
>>
>>> +             gpio1: gpio-controller@...80000 {
>>> +                     compatible = "cdns,gpio-r1p02";
>> This should not be accepted without specific compatible, but that's some
>> old binding so maybe matters less. Anyway, if you ever need quirk or
>> custom properties they I will reject them based on what you claim here.
> 
> Yes, we are not changing anything on this driver. Is it okay?

I meant for future. I would expect to follow writing bindings now, so
have front specific compatible, but if you do not then whatever issues
you have in the future with this driver, they should be rejected, right?

> 
> 
>>
>>
>>> +             i3c16: i3c@...20400 {
>>> +                     compatible = "cdns,i3c-master";
>>> +                     reg = <0x00 0x80620400 0x00 0x400>;
>>> +                     clocks = <&refclk &clk_xin>;
>>> +                     clock-names = "pclk", "sysclk";
>>> +                     interrupt-parent = <&gic500>;
>>> +                     interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
>>> +                     i2c-scl-hz = <100000>;
>>> +                     i3c-scl-hz = <400000>;
>>> +                     #address-cells = <3>;
>>> +                     #size-cells = <0>;
>>> +                     status = "disabled";
>>> +             };
>>> +             uart0: serial@...20000 {
>> Looks like not ordered by unit address. What is the ordering rule you
>> are going to adopt for entire arch?
> 
> Apologies for the confusion. I should have updated in last patch-set 
> comments.
> 
> We are following alphabetical ordering rule. In those we are grouping 
> some nodes together based on the numbers.
> 
> cpus
> 
> clocks
> 
> soc {
> 
>     gic500 { }
> 
>     gpio0-7 { }
> 
>     i3c0-16 { }
> 
>     uart0-3 { }
> 
> }
> 
> timer
> 
> 
> Is this okay?

alphabetical ordering is not mentioned in dts coding style. Maybe it
should, but I think the only user of second style with grouping nodes -
Renesas - still uses ordering by unit address in general.

The trouble with your approach is that if you ever need to change the
name, you will need to re-order and move entire node.

Anyway, not a problem for me.

> 
>>
>>> +                     compatible = "xlnx,zynqmp-uart", "cdns,uart-r1p12";
>> NAK, you do not have xlnx here. Look at your SoC: name of vendor is
>> axiado. Not xlnx. How is your SoC called? Also zynqmp? You cannot just
>> randomly pick any compatibles and stuff them around.
>>
>> Please carefully read writing bindings from DT directory.
> 
> 
> We are using the "cdns,uart-r1p12" for the UART. However, that alone 
> can't be added alone in the compatible as per the DT bindings doc.

Exactly. See writing bindings... or any guides/talks.


Best regards,
Krzysztof