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Message-ID: <20250625064934.4828-1-mihai.sain@microchip.com>
Date: Wed, 25 Jun 2025 09:49:31 +0300
From: Mihai Sain <mihai.sain@...rochip.com>
To: <nicolas.ferre@...rochip.com>, <alexandre.belloni@...tlin.com>,
<claudiu.beznea@...on.dev>, <robh@...nel.org>, <krzk+dt@...nel.org>,
<conor+dt@...nel.org>, <linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: Mihai Sain <mihai.sain@...rochip.com>
Subject: [PATCH 0/3] Update the cache configuration for Microchip SAMA5D MPUs
This patch series updates the cache configuration Microchip SAMA5D MPUs.
The cache configuration is described in block diagram from datasheet.
Mihai Sain (3):
ARM: dts: microchip: sama5d2: Update the cache configuration for CPU
ARM: dts: microchip: sama5d3: Update the cache configuration for CPU
ARM: dts: microchip: sama5d4: Update the cache configuration for CPU
arch/arm/boot/dts/microchip/sama5d2.dtsi | 3 +++
arch/arm/boot/dts/microchip/sama5d3.dtsi | 2 ++
arch/arm/boot/dts/microchip/sama5d4.dtsi | 3 +++
3 files changed, 8 insertions(+)
base-commit: 7595b66ae9de667bf35a8c99e8f1bfc4792e207e
--
2.50.0
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