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Message-ID: <b631c81c-50e9-429a-bca0-828d99076f3a@quicinc.com>
Date: Wed, 25 Jun 2025 16:08:21 +0530
From: Taniya Das <quic_tdas@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
Bjorn Andersson
<andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
"Stephen
Boyd" <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski
<krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Konrad Dybcio
<konradybcio@...nel.org>, Will Deacon <will@...nel.org>,
Catalin Marinas
<catalin.marinas@....com>
CC: Ajit Pandey <quic_ajipan@...cinc.com>,
Imran Shaik
<quic_imrashai@...cinc.com>,
Jagadeesh Kona <quic_jkona@...cinc.com>,
<linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
Dmitry Baryshkov <lumag@...nel.org>
Subject: Re: [PATCH v9 07/10] clk: qcom: gpucc-qcs615: Add QCS615 graphics
clock controller driver
On 6/15/2025 12:49 AM, Konrad Dybcio wrote:
> On 6/12/25 11:55 AM, Taniya Das wrote:
>> Add support for the graphics clock controller for graphics clients to
>> be able to request for the clocks on QCS615 platform.
>>
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
>> Signed-off-by: Taniya Das <quic_tdas@...cinc.com>
>> ---
>
> [...]
>
>> +struct clk_hw *gpu_cc_sm6150_hws[] = {
>
> "wink"
>
My bad.
> [...]
>
>> +static void configure_crc(struct regmap *regmap)
>> +{
>> + /* Recommended WAKEUP/SLEEP settings for the gpu_cc_cx_gmu_clk */
>> + regmap_update_bits(regmap, gpu_cc_cx_gmu_clk.clkr.enable_reg, 0xff0, 0xff0);
>> +
>> + /*
>> + * After POR, Clock Ramp Controller(CRC) will be in bypass mode.
>> + * Software needs to do the following operation to enable the CRC
>> + * for GFX3D clock and divide the input clock by div by 2.
>> + */
>> + regmap_update_bits(regmap, 0x1028, 0x00015011, 0x00015011);
>> + regmap_update_bits(regmap, 0x1024, 0x00800000, 0x00800000);
>
> I'm going to assume this is not the same ramp controller as:
>
> drivers/soc/qcom/ramp_controller.c
>
This ramp controller is at the RCG level, which was very specific to
8976 and not same at the CC level.
> ..or maybe it is one, but we need to set things up on the CC
> side
>
>> +}
>> +
>> +static int gpu_cc_qcs615_probe(struct platform_device *pdev)
>> +{
>> + struct regmap *regmap;
>> +
>> + regmap = qcom_cc_map(pdev, &gpu_cc_qcs615_desc);
>> + if (IS_ERR(regmap))
>> + return PTR_ERR(regmap);
>> +
>> + clk_alpha_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config);
>> + clk_alpha_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config);
>> +
>> + /* Keep some clocks always enabled */
>> + qcom_branch_set_clk_en(regmap, 0x1078); /* GPU_CC_AHB_CLK */
>> +
>> + configure_crc(regmap);
>
> Likewise, please rebase on Jagadeesh's series, which is now in
> linux-next. With that:
>
I will fix them in the next patch series.
> Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
>
> Konrad
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