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Message-Id: <cover.1750947640.git.namcao@linutronix.de>
Date: Thu, 26 Jun 2025 16:47:25 +0200
From: Nam Cao <namcao@...utronix.de>
To: "K . Y . Srinivasan" <kys@...rosoft.com>,
Marc Zyngier <maz@...nel.org>,
Haiyang Zhang <haiyangz@...rosoft.com>,
Wei Liu <wei.liu@...nel.org>,
Dexuan Cui <decui@...rosoft.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>,
x86@...nel.org,
"H . Peter Anvin" <hpa@...or.com>,
linux-hyperv@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Nam Cao <namcao@...utronix.de>
Subject: [PATCH 0/1] x86/hyperv: MSI parent domain conversion
The initial implementation of PCI/MSI interrupt domains in the hierarchical
interrupt domain model used a shortcut by providing a global PCI/MSI
domain.
This works because the PCI/MSI[X] hardware is standardized and uniform, but
it violates the basic design principle of hierarchical interrupt domains:
Each hardware block involved in the interrupt delivery chain should have a
separate interrupt domain.
For PCI/MSI[X], the interrupt controller is per PCI device and not a global
made-up entity.
Unsurprisingly, the shortcut turned out to have downsides as it does not
allow dynamic allocation of interrupt vectors after initialization and it
prevents supporting IMS on PCI. For further details, see:
https://lore.kernel.org/lkml/20221111120501.026511281@linutronix.de/
The solution is implementing per device MSI domains, this means the
entities which provide global PCI/MSI domain so far have to implement MSI
parent domain functionality instead.
This series converts the x86 hyperv driver to implement MSI parent domain.
arch/x86/hyperv/irqdomain.c | 107 ++++++++++++++++++++++++------------
drivers/hv/Kconfig | 1 +
2 files changed, 73 insertions(+), 35 deletions(-)
--
2.39.5
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