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Message-Id: <cover.1750858125.git.namcao@linutronix.de>
Date: Thu, 26 Jun 2025 16:48:53 +0200
From: Nam Cao <namcao@...utronix.de>
To: Marc Zyngier <maz@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Joerg Roedel <joro@...tes.org>,
Will Deacon <will@...nel.org>,
Robin Murphy <robin.murphy@....com>,
Suravee Suthikulpanit <suravee.suthikulpanit@....com>,
David Woodhouse <dwmw2@...radead.org>,
Lu Baolu <baolu.lu@...ux.intel.com>,
iommu@...ts.linux.dev,
linux-kernel@...r.kernel.org
Cc: Nam Cao <namcao@...utronix.de>
Subject: [PATCH 0/2] iommu: MSI parent domain conversion
The initial implementation of PCI/MSI interrupt domains in the hierarchical
interrupt domain model used a shortcut by providing a global PCI/MSI
domain.
This works because the PCI/MSI[X] hardware is standardized and uniform, but
it violates the basic design principle of hierarchical interrupt domains:
Each hardware block involved in the interrupt delivery chain should have a
separate interrupt domain.
For PCI/MSI[X], the interrupt controller is per PCI device and not a global
made-up entity.
Unsurprisingly, the shortcut turned out to have downsides as it does not
allow dynamic allocation of interrupt vectors after initialization and it
prevents supporting IMS on PCI. For further details, see:
https://lore.kernel.org/lkml/20221111120501.026511281@linutronix.de/
The solution is implementing per device MSI domains, this means the
entities which provide global PCI/MSI domain so far have to implement MSI
parent domain functionality instead.
This series convert the IOMMU drivers to implement MSI parent domain.
drivers/iommu/Kconfig | 1 +
drivers/iommu/amd/Kconfig | 1 +
drivers/iommu/amd/iommu.c | 26 ++++++++++++++------------
drivers/iommu/intel/irq_remapping.c | 28 ++++++++++++++--------------
4 files changed, 30 insertions(+), 26 deletions(-)
--
2.39.5
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