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Message-ID: <2768baad-1b1f-40c2-9cd9-9f4489e14f4d@intel.com>
Date: Thu, 26 Jun 2025 10:21:23 -0700
From: Dave Hansen <dave.hansen@...el.com>
To: Borislav Petkov <bp@...en8.de>,
"Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Cc: Andy Lutomirski <luto@...nel.org>, Thomas Gleixner <tglx@...utronix.de>,
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Yian Chen <yian.chen@...el.com>
Subject: Re: [PATCHv6 01/16] x86/cpu: Enumerate the LASS feature bits
On 6/26/25 09:07, Borislav Petkov wrote:
>> Makes more sense?
> I meant this crap, ofc:
>
> switch (bug) {
> case X86_BUG_CPU_MELTDOWN:
> if (boot_cpu_has(X86_FEATURE_PTI))
> return sysfs_emit(buf, "Mitigation: PTI\n");
>
> This should say "Mitigation: LASS" if LASS is enabled...
>
> Which begs the question: how do LASS and PTI interact now?
Maybe my babbling about LASS mitigation Meltdown was ill considered. It
seems that I've just muddied the waters.
All the real LASS-capable hardware also has RDCL_NO=1 which is the
_actual_ x86 Meltdown mitigation. Those systems are not vulnerable to
Meltdown in the first place.
They should say: "Not affected" for Meltdown, both before and after LASS.
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