linux-kernel - Re: [PATCH v2] arm64: dts: qcom: ipq5424: Describe the 4-wire UART SE

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <5925b608-1251-4b73-b310-948b383f7b7b@oss.qualcomm.com>
Date: Thu, 26 Jun 2025 10:46:07 +0530
From: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@....qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
 <conor+dt@...nel.org>,
        Mukesh Kumar Savaliya <quic_msavaliy@...cinc.com>,
        Viken Dadhaniya <quic_vdadhani@...cinc.com>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] arm64: dts: qcom: ipq5424: Describe the 4-wire UART SE


On 6/25/2025 5:44 PM, Konrad Dybcio wrote:
> On 6/25/25 7:55 AM, Kathiravan Thirumoorthy wrote:
>> On 6/24/2025 8:08 PM, Konrad Dybcio wrote:
>>> On 6/24/25 11:00 AM, Kathiravan Thirumoorthy wrote:
>>>> QUPv3 in IPQ5424 consists of six Serial Engines (SEs). Describe the
>>>> first SE, which supports a 4-wire UART configuration suitable for
>>>> applications such as HS-UART.
>>>>
>>>> Note that the required initialization for this SE is not handled by the
>>>> bootloader. Therefore, add the SE node in the device tree but keep it
>>>> disabled. Enable it once Linux gains support for configuring the SE,
>>>> allowing to use in relevant RDPs.
>>> Do you mean fw loading support?
>> SE0 is minicore, so we don't need to load the FW. But apart from FW , protocol specific configurations to be done in the SE's Image Configuration registers, which is taken care in the patch[1]
>>
>> [1] [PATCH v5 0/5] Add support to load QUP SE firmware from <https://lore.kernel.org/linux-arm-msm/20250624095102.1587580-1-viken.dadhaniya@oss.qualcomm.com/T/#m37a6b739c66040cde5b6b0121a03da7ea6715842>
> I've heard the 'minicore' or similar name before.. how does it differ
> from a "normal" SE? (+Mukesh & Viken)

There are 2 types of SE. One is Minicore and another one is FW based.

Minicore SE supports only I2C / SPI / UART protocols and it is fixed in 
RTL. Depends on the protocol needed, we need to configure the "Image 
Configuration registers".

FW based SE supports wide variety of protocols like I3C, CAN and so on. 
This can be achieved by the loading the protocol specific FW image and 
configuring the "Image Configuration registers".

> Konrad