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Message-ID: <54unag6whlbkjujjirsgqqiukadudgbcfsol2jwdbc523ebas7@3shvc3yepkmq>
Date: Fri, 27 Jun 2025 02:46:34 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Jun Nie <jun.nie@...aro.org>
Cc: Rob Clark <robdclark@...il.com>, Abhinav Kumar <quic_abhinavk@...cinc.com>,
Sean Paul <sean@...rly.run>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Jessica Zhang <quic_jesszhan@...cinc.com>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>, linux-arm-msm@...r.kernel.org,
dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v11 11/12] drm/msm/dpu: support plane splitting in
quad-pipe case
On Thu, Jun 12, 2025 at 03:44:32PM +0800, Jun Nie wrote:
> Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com> 于2025年6月3日周二 18:24写道：
> >
> > On Tue, Jun 03, 2025 at 03:10:10PM +0800, Jun Nie wrote:
> > > The content of every half of screen is sent out via one interface in
> > > dual-DSI case. The content for every interface is blended by a LM
> > > pair in quad-pipe case, thus a LM pair should not blend any content
> > > that cross the half of screen in this case. Clip plane into pipes per
> > > left and right half screen ROI if topology is quad pipe case.
> > >
> > > The clipped rectangle on every half of screen is futher handled by two
> > > pipes if its width exceeds a limit for a single pipe.
> > >
> > > Signed-off-by: Jun Nie <jun.nie@...aro.org>
> > > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> > > ---
> > > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 11 +++
> > > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 2 +
> > > drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 137 +++++++++++++++++++++---------
> > > 3 files changed, 110 insertions(+), 40 deletions(-)
> > >
> > > @@ -886,35 +887,94 @@ static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane,
> > >
> > > max_linewidth = pdpu->catalog->caps->max_linewidth;
> > >
> > > - drm_rect_rotate(&pipe_cfg->src_rect,
> > > + drm_rect_rotate(&init_pipe_cfg.src_rect,
> > > new_plane_state->fb->width, new_plane_state->fb->height,
> > > new_plane_state->rotation);
> > >
> > > - if ((drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) ||
> > > - _dpu_plane_calc_clk(&crtc_state->adjusted_mode, pipe_cfg) > max_mdp_clk_rate) {
> > > - if (drm_rect_width(&pipe_cfg->src_rect) > 2 * max_linewidth) {
> > > - DPU_DEBUG_PLANE(pdpu, "invalid src " DRM_RECT_FMT " line:%u\n",
> > > - DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth);
> > > - return -E2BIG;
> > > + /*
> > > + * We have 1 mixer pair cfg for 1:1:1 and 2:2:1 topology, 2 mixer pair
> > > + * configs for left and right half screen in case of 4:4:2 topology.
> > > + * But we may have 2 rect to split wide plane that exceeds limit with 1
> > > + * config for 2:2:1. So need to handle both wide plane splitting, and
> > > + * two halves of screen splitting for quad-pipe case. Check dest
> > > + * rectangle left/right clipping first, then check wide rectangle
> > > + * splitting in every half next.
> > > + */
> > > + num_stages = (num_lm + 1) / 2;
> >
> > I thought we agreed to loop over all stages, dropping the need for
> > num_lm.
>
> num_stages is needed here, so that the plane can be cropped into left/right
> half of LCD and result pipe will be handled by 2 stages in quadpipe case.
> While only 1 stage is involved in 1 or 2 pipe case and the crop operation
> does not make a real impact. If we do not care num_lm and use 2 stages
> by default, then we are forcing quad-pipe. Do you have any suggestion?
I'm sorry, it took me a while to respond.
No, this is fine.
>
> >
> > > + /* iterate mixer configs for this plane, to separate left/right with the id */
> > > + for (stage_id = 0; stage_id < num_stages; stage_id++) {
> > > + struct drm_rect mixer_rect = {
> > > + .x1 = stage_id * mode->hdisplay / num_stages,
> > > + .y1 = 0,
> > > + .x2 = (stage_id + 1) * mode->hdisplay / num_stages,
>
> The crop window is calculated with num_stages here.
Ack.
>
> > > + .y2 = mode->vdisplay
> > > + };
> > > + int cfg_idx = stage_id * PIPES_PER_STAGE;
> > > +
> > > + pipe_cfg = &pstate->pipe_cfg[cfg_idx];
> > > + r_pipe_cfg = &pstate->pipe_cfg[cfg_idx + 1];
> > > +
> > > + drm_rect_fp_to_int(&pipe_cfg->src_rect, &new_plane_state->src);
> > > + pipe_cfg->dst_rect = new_plane_state->dst;
> > > +
> > > + DPU_DEBUG_PLANE(pdpu, "checking src " DRM_RECT_FMT
> > > + " vs clip window " DRM_RECT_FMT "\n",
> > > + DRM_RECT_ARG(&pipe_cfg->src_rect),
> > > + DRM_RECT_ARG(&mixer_rect));
> > > +
> > > + /*
> > > + * If this plane does not fall into mixer rect, check next
> > > + * mixer rect.
> > > + */
> > > + if (!drm_rect_clip_scaled(&pipe_cfg->src_rect,
> > > + &pipe_cfg->dst_rect,
> > > + &mixer_rect)) {
> > > + memset(pipe_cfg, 0, 2 * sizeof(struct dpu_sw_pipe_cfg));
> > > +
> > > + continue;
> > > }
> > >
> > > - *r_pipe_cfg = *pipe_cfg;
> > > - pipe_cfg->src_rect.x2 = (pipe_cfg->src_rect.x1 + pipe_cfg->src_rect.x2) >> 1;
> > > - pipe_cfg->dst_rect.x2 = (pipe_cfg->dst_rect.x1 + pipe_cfg->dst_rect.x2) >> 1;
> > > - r_pipe_cfg->src_rect.x1 = pipe_cfg->src_rect.x2;
> > > - r_pipe_cfg->dst_rect.x1 = pipe_cfg->dst_rect.x2;
> > > - } else {
> > > - memset(r_pipe_cfg, 0, sizeof(*r_pipe_cfg));
> > > - }
> > > + pipe_cfg->dst_rect.x1 -= mixer_rect.x1;
> > > + pipe_cfg->dst_rect.x2 -= mixer_rect.x1;
> > > +
> > > + DPU_DEBUG_PLANE(pdpu, "Got clip src:" DRM_RECT_FMT " dst: " DRM_RECT_FMT "\n",
> > > + DRM_RECT_ARG(&pipe_cfg->src_rect), DRM_RECT_ARG(&pipe_cfg->dst_rect));
> > > +
> > > + /* Split wide rect into 2 rect */
> > > + if ((drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) ||
> > > + _dpu_plane_calc_clk(mode, pipe_cfg) > max_mdp_clk_rate) {
> > > +
> > > + if (drm_rect_width(&pipe_cfg->src_rect) > 2 * max_linewidth) {
> > > + DPU_DEBUG_PLANE(pdpu, "invalid src " DRM_RECT_FMT " line:%u\n",
> > > + DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth);
> > > + return -E2BIG;
> > > + }
> > > +
> > > + memcpy(r_pipe_cfg, pipe_cfg, sizeof(struct dpu_sw_pipe_cfg));
> > > + pipe_cfg->src_rect.x2 = (pipe_cfg->src_rect.x1 + pipe_cfg->src_rect.x2) >> 1;
> > > + pipe_cfg->dst_rect.x2 = (pipe_cfg->dst_rect.x1 + pipe_cfg->dst_rect.x2) >> 1;
> > > + r_pipe_cfg->src_rect.x1 = pipe_cfg->src_rect.x2;
> > > + r_pipe_cfg->dst_rect.x1 = pipe_cfg->dst_rect.x2;
> > > + DPU_DEBUG_PLANE(pdpu, "Split wide plane into:"
> > > + DRM_RECT_FMT " and " DRM_RECT_FMT "\n",
> > > + DRM_RECT_ARG(&pipe_cfg->src_rect),
> > > + DRM_RECT_ARG(&r_pipe_cfg->src_rect));
> > > + } else {
> > > + memset(r_pipe_cfg, 0, sizeof(struct dpu_sw_pipe_cfg));
> > > + }
> > >
> > > - drm_rect_rotate_inv(&pipe_cfg->src_rect,
> > > - new_plane_state->fb->width, new_plane_state->fb->height,
> > > - new_plane_state->rotation);
> > > - if (drm_rect_width(&r_pipe_cfg->src_rect) != 0)
> > > - drm_rect_rotate_inv(&r_pipe_cfg->src_rect,
> > > - new_plane_state->fb->width, new_plane_state->fb->height,
> > > + drm_rect_rotate_inv(&pipe_cfg->src_rect,
> > > + new_plane_state->fb->width,
> > > + new_plane_state->fb->height,
> > > new_plane_state->rotation);
> > >
> > > + if (drm_rect_width(&r_pipe_cfg->src_rect) != 0)
> > > + drm_rect_rotate_inv(&r_pipe_cfg->src_rect,
> > > + new_plane_state->fb->width,
> > > + new_plane_state->fb->height,
> > > + new_plane_state->rotation);
> > > + }
> > > +
> > > pstate->needs_qos_remap = drm_atomic_crtc_needs_modeset(crtc_state);
> > >
> > > return 0;
> > > @@ -997,20 +1057,17 @@ static int dpu_plane_atomic_check_sspp(struct drm_plane *plane,
> > > drm_atomic_get_new_plane_state(state, plane);
> > > struct dpu_plane *pdpu = to_dpu_plane(plane);
> > > struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state);
> > > - struct dpu_sw_pipe *pipe = &pstate->pipe[0];
> > > - struct dpu_sw_pipe *r_pipe = &pstate->pipe[1];
> > > - struct dpu_sw_pipe_cfg *pipe_cfg = &pstate->pipe_cfg[0];
> > > - struct dpu_sw_pipe_cfg *r_pipe_cfg = &pstate->pipe_cfg[1];
> > > - int ret = 0;
> > > -
> > > - ret = dpu_plane_atomic_check_pipe(pdpu, pipe, pipe_cfg,
> > > - &crtc_state->adjusted_mode,
> > > - new_plane_state);
> > > - if (ret)
> > > - return ret;
> > > + struct dpu_sw_pipe *pipe;
> > > + struct dpu_sw_pipe_cfg *pipe_cfg;
> > > + int ret = 0, i;
> > >
> > > - if (drm_rect_width(&r_pipe_cfg->src_rect) != 0) {
> > > - ret = dpu_plane_atomic_check_pipe(pdpu, r_pipe, r_pipe_cfg,
> > > + for (i = 0; i < PIPES_PER_PLANE; i++) {
> > > + pipe = &pstate->pipe[i];
> > > + pipe_cfg = &pstate->pipe_cfg[i];
> > > + if (!pipe->sspp)
> > > + continue;
> > > + DPU_DEBUG_PLANE(pdpu, "pipe %d is in use, validate it\n", i);
> > > + ret = dpu_plane_atomic_check_pipe(pdpu, pipe, pipe_cfg,
> > > &crtc_state->adjusted_mode,
> > > new_plane_state);
> > > if (ret)
> > >
> > > --
> > > 2.34.1
> > >
> >
> > --
> > With best wishes
> > Dmitry
--
With best wishes
Dmitry
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