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Message-Id: <20250626073804.3113757-2-hongxing.zhu@nxp.com>
Date: Thu, 26 Jun 2025 15:38:02 +0800
From: Richard Zhu <hongxing.zhu@....com>
To: frank.li@....com,
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lpieralisi@...nel.org,
kwilczynski@...nel.org,
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Cc: linux-pci@...r.kernel.org,
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Richard Zhu <hongxing.zhu@....com>
Subject: [PATCH v4 1/3] dt-bindings: PCI: dwc: Add one more reference clock
Add one more reference clock "extref" to be onhalf the reference clock
that comes from external crystal oscillator.
Signed-off-by: Richard Zhu <hongxing.zhu@....com>
---
.../devicetree/bindings/pci/snps,dw-pcie-common.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
index 34594972d8db..ee09e0d3bbab 100644
--- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
+++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
@@ -105,6 +105,12 @@ properties:
define it with this name (for instance pipe, core and aux can
be connected to a single source of the periodic signal).
const: ref
+ - description:
+ Some dwc wrappers (like i.MX95 PCIes) have two reference clock
+ inputs, one from internal PLL, the other from off chip crystal
+ oscillator. Use extref clock name to be onhalf of the reference
+ clock comes form external crystal oscillator.
+ const: extref
- description:
Clock for the PHY registers interface. Originally this is
a PHY-viewport-based interface, but some platform may have
--
2.37.1
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