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Message-ID: <99c4946f2857e165d74d498476be75db21ff4cee.camel@arm.com>
Date: Fri, 27 Jun 2025 09:49:31 +0000
From: Sascha Bischoff <Sascha.Bischoff@....com>
To: "lpieralisi@...nel.org" <lpieralisi@...nel.org>
CC: "yuzenghui@...wei.com" <yuzenghui@...wei.com>, "tglx@...utronix.de"
<tglx@...utronix.de>, Timothy Hayes <Timothy.Hayes@....com>, nd <nd@....com>,
"oliver.upton@...ux.dev" <oliver.upton@...ux.dev>, "kvmarm@...ts.linux.dev"
<kvmarm@...ts.linux.dev>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>, "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>, "kvm@...r.kernel.org"
<kvm@...r.kernel.org>, Joey Gouly <Joey.Gouly@....com>, "maz@...nel.org"
<maz@...nel.org>, Suzuki Poulose <Suzuki.Poulose@....com>, "will@...nel.org"
<will@...nel.org>
Subject: Re: [PATCH 1/5] irqchip/gic-v5: Skip deactivate for forwarded PPI
interrupts
On Mon, 2025-06-23 at 17:21 +0200, Lorenzo Pieralisi wrote:
> On Fri, Jun 20, 2025 at 04:07:50PM +0000, Sascha Bischoff wrote:
> > If a PPI interrupt is forwarded to a guest, skip the deactivate and
> > only EOI. Rely on the guest deactivating the both the virtual and
>
> "deactivating both"
Done.
>
> > physical interrupts (due to ICH_LRx_EL2.HW being set) later on as
> > part
> > of handling the injected interrupt. This mimics the behaviour seen
> > on
> > native GICv3.
> >
> > This is part of adding support for the GICv3 compatibility mode on
> > a
> > GICv5 host.
> >
> > Co-authored-by: Timothy Hayes <timothy.hayes@....com>
> > Signed-off-by: Timothy Hayes <timothy.hayes@....com>
> > Signed-off-by: Sascha Bischoff <sascha.bischoff@....com>
> > ---
> > drivers/irqchip/irq-gic-v5.c | 17 +++++++++++++++++
> > 1 file changed, 17 insertions(+)
>
> Reviewed-by: Lorenzo Pieralisi <lpieralisi@...nel.org>
Done. Thanks!
Sascha
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