lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID:
 <SEYPR06MB5134CA634C03D4BB0F73E4BD9D45A@SEYPR06MB5134.apcprd06.prod.outlook.com>
Date: Fri, 27 Jun 2025 09:59:55 +0000
From: Jacky Chou <jacky_chou@...eedtech.com>
To: Rob Herring <robh@...nel.org>
CC: "bhelgaas@...gle.com" <bhelgaas@...gle.com>, "lpieralisi@...nel.org"
	<lpieralisi@...nel.org>, "kwilczynski@...nel.org" <kwilczynski@...nel.org>,
	"mani@...nel.org" <mani@...nel.org>, "krzk+dt@...nel.org"
	<krzk+dt@...nel.org>, "conor+dt@...nel.org" <conor+dt@...nel.org>,
	"joel@....id.au" <joel@....id.au>, "andrew@...econstruct.com.au"
	<andrew@...econstruct.com.au>, "vkoul@...nel.org" <vkoul@...nel.org>,
	"kishon@...nel.org" <kishon@...nel.org>, "linus.walleij@...aro.org"
	<linus.walleij@...aro.org>, "p.zabel@...gutronix.de"
	<p.zabel@...gutronix.de>, "linux-aspeed@...ts.ozlabs.org"
	<linux-aspeed@...ts.ozlabs.org>, "linux-pci@...r.kernel.org"
	<linux-pci@...r.kernel.org>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "linux-phy@...ts.infradead.org"
	<linux-phy@...ts.infradead.org>, "openbmc@...ts.ozlabs.org"
	<openbmc@...ts.ozlabs.org>, "linux-gpio@...r.kernel.org"
	<linux-gpio@...r.kernel.org>, "elbadrym@...gle.com" <elbadrym@...gle.com>,
	"romlem@...gle.com" <romlem@...gle.com>, "anhphan@...gle.com"
	<anhphan@...gle.com>, "wak@...gle.com" <wak@...gle.com>,
	"yuxiaozhang@...gle.com" <yuxiaozhang@...gle.com>, BMC-SW
	<BMC-SW@...eedtech.com>
Subject:
 回覆: [PATCH 3/7] dt-bindings: pci: Add document for ASPEED PCIe RC

> > +  reset-names:
> > +    items:
> > +      - const: h2x
> > +      - const: perst
> > +
> > +  msi-parent: true
> > +
> > +  msi_address:
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    description: MSI address
> 
> What's this for?
> 

This is used for the kernel assigns the MSI address to PCIe device.
The address is fixed in HW. I think I will remove this and add hard
code in driver in next version.

> > +
> > +  aspeed,ahbc:
> > +    $ref: /schemas/types.yaml#/definitions/phandle
> > +    description: Phandle to ASPEED AHBC syscon.
> > +
> > +  aspeed,pciecfg:
> > +    $ref: /schemas/types.yaml#/definitions/phandle
> > +    description: Phandle to ASPEED PCIe configuration syscon.
> > +
> > +  aspeed,pciephy:
> > +    $ref: /schemas/types.yaml#/definitions/phandle
> > +    description: Phandle to ASPEED PCIe PHY syscon.
> 
> Use the phy binding and make the phy control a separate driver.
> 

Do you mean to create a PHY driver with devm_phy_create()?
Then, the PCIe RC driver uses the API of PHY to call phy_ops?

Thanks,
Jacky

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ