linux-kernel - Re: [PATCH 2/2] bitops: rotate: Add riscv implementation using Zbb extension

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Message-ID: <20250628111357.1627-1-cp0613@linux.alibaba.com>
Date: Sat, 28 Jun 2025 19:13:57 +0800
From: cp0613@...ux.alibaba.com
To: yury.norov@...il.com
Cc: alex@...ti.fr,
	aou@...s.berkeley.edu,
	arnd@...db.de,
	cp0613@...ux.alibaba.com,
	linux-arch@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-riscv@...ts.infradead.org,
	linux@...musvillemoes.dk,
	palmer@...belt.com,
	paul.walmsley@...ive.com
Subject: Re: [PATCH 2/2] bitops: rotate: Add riscv implementation using Zbb extension

On Fri, 20 Jun 2025 12:20:47 -0400, yury.norov@...il.com wrote:

> Can you add a comment about what is happening here? Are you sure it's
> optimized out in case of the 'legacy' alternative?

Thank you for your review. Yes, I referred to the existing variable__fls()
implementation, which should be fine.

> Here you wire ror/rol() to the variable_ror/rol() unconditionally, and
> that breaks compile-time rotation if the parameter is known at compile
> time.
> 
> I believe, generic implementation will allow compiler to handle this
> case better. Can you do a similar thing to what fls() does in the same
> file?

I did consider it, but I did not find any toolchain that provides an
implementation similar to __builtin_ror or __builtin_rol. If there is one,
please help point it out.
In addition, I did not consider it carefully before. If the rotate function
is to be genericized, all archneed to include <asm-generic/bitops/rotate.h>.
I missed this step.