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Message-ID: <1e2997cd-6932-46bd-8d5b-35a98b52abae@redhat.com>
Date: Sun, 29 Jun 2025 21:04:15 +0200
From: Ivan Vecera <ivecera@...hat.com>
To: Paolo Abeni <pabeni@...hat.com>, netdev@...r.kernel.org
Cc: Prathosh Satish <Prathosh.Satish@...rochip.com>,
Vadim Fedorenko <vadim.fedorenko@...ux.dev>,
Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>,
Jiri Pirko <jiri@...nulli.us>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, "David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
Simon Horman <horms@...nel.org>, Jonathan Corbet <corbet@....net>,
Jason Gunthorpe <jgg@...pe.ca>, Shannon Nelson <shannon.nelson@....com>,
Dave Jiang <dave.jiang@...el.com>,
Jonathan Cameron <Jonathan.Cameron@...wei.com>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org,
Michal Schmidt <mschmidt@...hat.com>, Petr Oros <poros@...hat.com>
Subject: Re: [PATCH net-next v11 14/14] dpll: zl3073x: Add support to get/set
frequency on output pins
On 19. 06. 25 1:40 odp., Paolo Abeni wrote:
> On 6/16/25 10:14 PM, Ivan Vecera wrote:
>> +static int
>> +zl3073x_dpll_output_pin_frequency_set(const struct dpll_pin *dpll_pin,
>> + void *pin_priv,
>> + const struct dpll_device *dpll,
>> + void *dpll_priv, u64 frequency,
>> + struct netlink_ext_ack *extack)
>> +{
>> + struct zl3073x_dpll *zldpll = dpll_priv;
>> + struct zl3073x_dev *zldev = zldpll->dev;
>> + struct zl3073x_dpll_pin *pin = pin_priv;
>> + struct device *dev = zldev->dev;
>> + u32 output_n_freq, output_p_freq;
>> + u8 out, signal_format, synth;
>> + u32 cur_div, new_div, ndiv;
>> + u32 synth_freq;
>> + int rc;
>> +
>> + out = zl3073x_output_pin_out_get(pin->id);
>> + synth = zl3073x_out_synth_get(zldev, out);
>> + synth_freq = zl3073x_synth_freq_get(zldev, synth);
>> +
>> + /* Check the requested frequency divides synth frequency without
>> + * remainder.
>> + */
>> + if (synth_freq % (u32)frequency) {
>
> As the frequency comes from user-space and is validated only the DT
> info, which in turn is AFAICS imported verbatim into the kernel, I
> *think* it would be safer to check for 0 here or at DT info load time.
This check is superfluous, the frequency from user-space is validated
in DPLL core against frequency list provided for particular pin by the
driver. And frequencies from DT are filtered/checked during load.
So no check is needed here.
Will fix.
Ivan
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