linux-kernel - Re: [PATCH v2] dt-bindings: interrupt-controller: Convert fsl,mpic-msi to YAML

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Message-ID: <aGCbQ100CFJz6BjK@probook>
Date: Sun, 29 Jun 2025 01:47:47 +0000
From: J. Neuschäfer <j.ne@...teo.net>
To: Rob Herring <robh@...nel.org>
Cc: J. Neuschäfer <j.ne@...teo.net>,
	Thomas Gleixner <tglx@...utronix.de>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, Crystal Wood <oss@...error.net>,
	Madhavan Srinivasan <maddy@...ux.ibm.com>,
	Michael Ellerman <mpe@...erman.id.au>,
	Nicholas Piggin <npiggin@...il.com>,
	Christophe Leroy <christophe.leroy@...roup.eu>,
	Naveen N Rao <naveen@...nel.org>, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org
Subject: Re: [PATCH v2] dt-bindings: interrupt-controller: Convert
 fsl,mpic-msi to YAML

On Wed, Jun 25, 2025 at 03:12:32PM -0500, Rob Herring wrote:
> On Wed, Jun 11, 2025 at 11:42:09AM +0200, J. Neuschäfer wrote:
> > As part of a larger effort to bring various PowerPC-related bindings
> > into the YAML world, this patch converts msi-pic.txt to YAML and moves
> > it into the bindings/interrupt-controller/ directory. The conversion may
> > necessarily be a bit hard to read because the binding is quite verbose.
> > 
> > Signed-off-by: J. Neuschäfer <j.ne@...teo.net>
> > ---
[...]
> > +  interrupts:
> > +    minItems: 1
> > +    maxItems: 16
[...]
> > +required:
> > +  - compatible
> > +  - reg
> > +  - interrupts
> > +
> > +anyOf:
> 
> allOf

AFAIUI, at the current moment it doesn't make a difference because there
is only one item under the anyOf/allOf, but for robustness allOf looks
better.

> 
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            enum:
> > +              - fsl,mpic-msi-v4.3
> > +              - fsl,vmpic-msi-v4.3
> > +    then:
> > +      properties:
> > +        interrupts:
> > +          maxItems: 16
> 
> Don't you mean 'minItems: 16'? Otherwise, this schema has no effect.

Indeed.

> 
> I can fix these up when applying.

Please do. Thank you!

J. Neuschäfer

> 
> > +          description:
> > +            Version 4.3 implies that there are 16 shared interrupts, and they
> > +            are configured through MSIIR1.