linux-kernel - Re: [PATCH 00/10] Add clock drivers for SM7635

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Message-Id: <DB0RG4PFFP4A.1BAZWWZU2TWJF@fairphone.com>
Date: Tue, 01 Jul 2025 15:42:06 +0200
From: "Luca Weiss" <luca.weiss@...rphone.com>
To: "Dmitry Baryshkov" <dmitry.baryshkov@....qualcomm.com>
Cc: "Konrad Dybcio" <konrad.dybcio@....qualcomm.com>, "Bjorn Andersson"
 <andersson@...nel.org>, "Michael Turquette" <mturquette@...libre.com>,
 "Stephen Boyd" <sboyd@...nel.org>, "Rob Herring" <robh@...nel.org>,
 "Krzysztof Kozlowski" <krzk+dt@...nel.org>, "Conor Dooley"
 <conor+dt@...nel.org>, "Konrad Dybcio" <konradybcio@...nel.org>,
 <~postmarketos/upstreaming@...ts.sr.ht>, <phone-devel@...r.kernel.org>,
 <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
 <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 00/10] Add clock drivers for SM7635

On Tue Jul 1, 2025 at 1:16 PM CEST, Dmitry Baryshkov wrote:
> On Mon, Jun 30, 2025 at 10:01:35AM +0200, Luca Weiss wrote:
>> Hi Konrad,
>> 
>> On Fri Jun 27, 2025 at 5:14 PM CEST, Luca Weiss wrote:
>> > On Fri Jun 27, 2025 at 5:10 PM CEST, Konrad Dybcio wrote:
>> >> On 6/25/25 11:12 AM, Luca Weiss wrote:
>> >>> Document and add the clock drivers for GCC, CAMCC, DISPCC, GPUCC and
>> >>> VIDEOCC on the SM7635 SoC.
>> >>> 
>> >>> Signed-off-by: Luca Weiss <luca.weiss@...rphone.com>
>> >>> ---
>> >>> Luca Weiss (10):
>> >>>       dt-bindings: clock: qcom: document the SM7635 Global Clock Controller
>> >>>       clk: qcom: Add Global Clock controller (GCC) driver for SM7635
>> >>>       dt-bindings: clock: qcom: document the SM7635 Camera Clock Controller
>> >>>       clk: qcom: Add Camera Clock controller (CAMCC) driver for SM7635
>> >>>       dt-bindings: clock: qcom: document the SM7635 Display Clock Controller
>> >>>       clk: qcom: Add Display Clock controller (DISPCC) driver for SM7635
>> >>>       dt-bindings: clock: qcom: document the SM7635 GPU Clock Controller
>> >>>       clk: qcom: Add Graphics Clock controller (GPUCC) driver for SM7635
>> >>>       dt-bindings: clock: qcom: document the SM7635 Video Clock Controller
>> >>>       clk: qcom: Add Video Clock controller (VIDEOCC) driver for SM7635
>> >>
>> >> We had a massive yak shaving patchset go in this season, please move
>> >> the magic settings in .probe to qcom_cc_driver_data {}
>> >
>> > Okay cool, I found them
>> > https://lore.kernel.org/linux-arm-msm/174970084192.547582.612305407582982706.b4-ty@kernel.org/
>> 
>> For camcc, gpucc and videocc it seems quite simple to follow these
>> changes.
>> 
>> For dispcc I don't know what to do with this line.
>> 
>> 	/* Enable clock gating for MDP clocks */
>> 	regmap_update_bits(regmap, DISP_CC_MISC_CMD, 0x10, 0x10);
>
> Use clk_regs_configure() callback to set this bit.

Got it, found an example on the lists.

>
>> 
>> Do I just keep the regmap references in this probe function and just
>> move the clk_lucid_ole_pll_configure & qcom_branch_set_clk_en to the
>> config struct?
>> 
>> And similar for gcc, I can move the qcom_branch_set_clk_en calls there
>> but the qcom_cc_register_rcg_dfs needs to be kept.
>
> Would you mind extnding struct qcom_cc_desc with args to call
> qcom_cc_register_rcg_dfs() and call it from qcom_cc_really_probe()?

Something like this? Not quite sure when (in what order) this should be
called, is that place fine?

I'd include a patch then in the v2 of this series.

diff --git a/drivers/clk/qcom/common.c b/drivers/clk/qcom/common.c
index b3838d885db2..d53f290c6121 100644
--- a/drivers/clk/qcom/common.c
+++ b/drivers/clk/qcom/common.c
@@ -390,6 +390,14 @@ int qcom_cc_really_probe(struct device *dev,
 			goto put_rpm;
 	}
 
+	if (desc->dfs_rcgs && desc->num_dfs_rcgs) {
+		ret = qcom_cc_register_rcg_dfs(regmap,
+					       desc->dfs_rcgs,
+					       desc->num_dfs_rcgs);
+		if (ret)
+			goto put_rpm;
+	}
+
 	cc->rclks = rclks;
 	cc->num_rclks = num_clks;
 
diff --git a/drivers/clk/qcom/common.h b/drivers/clk/qcom/common.h
index 0f4b2d40c65c..dbe7ebe5b871 100644
--- a/drivers/clk/qcom/common.h
+++ b/drivers/clk/qcom/common.h
@@ -43,6 +43,8 @@ struct qcom_cc_desc {
 	size_t num_gdscs;
 	struct clk_hw **clk_hws;
 	size_t num_clk_hws;
+	const struct clk_rcg_dfs_data *dfs_rcgs;
+	size_t num_dfs_rcgs;
 	const struct qcom_icc_hws_data *icc_hws;
 	size_t num_icc_hws;
 	unsigned int icc_first_node_id;


Regards
Luca

>
>> 
>> Does that sound okay, or what exactly is the desired outcome of the
>> requested changes?
>> 
>> Regards
>> Luca
>> 
>> >
>> >>
>> >> Konrad
>>