linux-kernel - Re: [PATCH v4 0/6] spi: spi-fsl-dspi: Target mode improvements

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Message-ID: <dd41f014-79e8-4567-9617-754b93e2c12d@sirena.org.uk>
Date: Tue, 1 Jul 2025 16:16:50 +0100
From: Mark Brown <broonie@...nel.org>
To: Vladimir Oltean <vladimir.oltean@....com>
Cc: James Clark <james.clark@...aro.org>,
	Vladimir Oltean <olteanv@...il.com>, Arnd Bergmann <arnd@...db.de>,
	Larisa Grigore <larisa.grigore@....com>,
	Frank Li <Frank.li@....com>, Christoph Hellwig <hch@....de>,
	linux-spi@...r.kernel.org, imx@...ts.linux.dev,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 0/6] spi: spi-fsl-dspi: Target mode improvements

On Tue, Jul 01, 2025 at 05:53:12PM +0300, Vladimir Oltean wrote:

> I suppose one could try using FIFO mode for transfers which request
> timestamping and DMA for transfers which don't. I don't have an insight
> into what impact that will have on the driver, but I suspect at the very
> least one will have to transform "DSPI_DMA_MODE" into "dspi->dma_available"
> and "dspi->dma_in_use", and reconfigure the SPI_RSER register (interrupt
> routing, to DMA engine or to CPUs) at every transfer rather than at dspi_init().

> The question is whether you would be willing to see and maintain such
> complexity increase, when AFAIK, the LS1028A FIFO mode passes its
> requirements.

Switching between modes is incredibly common, usually between PIO (for
very short transfers) and DMA, that's no problem.  Factoring in
timestamping seems like a reasonable signal I guess, might trip someone
who was trying to benchmark things up but probably not normal users.

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