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Message-Id: <20250701-jag-sysctldoc-v1-6-936912553f58@kernel.org>
Date: Tue, 01 Jul 2025 10:56:47 +0200
From: Joel Granados <joel.granados@...nel.org>
To: Kees Cook <kees@...nel.org>, Jonathan Corbet <corbet@....net>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
Alexandre Ghiti <alex@...ti.fr>
Cc: linux-kernel@...r.kernel.org, linux-fsdevel@...r.kernel.org,
linux-doc@...r.kernel.org, linux-riscv@...ts.infradead.org,
Joel Granados <joel.granados@...nel.org>
Subject: [PATCH 6/6] docs: Downgrade arm64 & riscv from titles to comment
Remove the title string ("====") from under arm64 & riscv and move them
to a commment under the perf_user_access sysctl. They are explanations,
*not* sysctls themselves
This effectively removes these two strings from appearing as not
implemented when the check-sysctl-docs script is run
Signed-off-by: Joel Granados <joel.granados@...nel.org>
---
Documentation/admin-guide/sysctl/kernel.rst | 32 +++++++++++++----------------
1 file changed, 14 insertions(+), 18 deletions(-)
diff --git a/Documentation/admin-guide/sysctl/kernel.rst b/Documentation/admin-guide/sysctl/kernel.rst
index dd49a89a62d3542fa1a599f318dff26589e1d57b..c2683ce17b25821559d0c04914aea360440c7309 100644
--- a/Documentation/admin-guide/sysctl/kernel.rst
+++ b/Documentation/admin-guide/sysctl/kernel.rst
@@ -1014,30 +1014,26 @@ perf_user_access (arm64 and riscv only)
Controls user space access for reading perf event counters.
-arm64
-=====
+* for arm64
+ The default value is 0 (access disabled).
-The default value is 0 (access disabled).
+ When set to 1, user space can read performance monitor counter registers
+ directly.
-When set to 1, user space can read performance monitor counter registers
-directly.
+ See Documentation/arch/arm64/perf.rst for more information.
-See Documentation/arch/arm64/perf.rst for more information.
+* for riscv
+ When set to 0, user space access is disabled.
-riscv
-=====
+ The default value is 1, user space can read performance monitor counter
+ registers through perf, any direct access without perf intervention will trigger
+ an illegal instruction.
-When set to 0, user space access is disabled.
+ When set to 2, which enables legacy mode (user space has direct access to cycle
+ and insret CSRs only). Note that this legacy value is deprecated and will be
+ removed once all user space applications are fixed.
-The default value is 1, user space can read performance monitor counter
-registers through perf, any direct access without perf intervention will trigger
-an illegal instruction.
-
-When set to 2, which enables legacy mode (user space has direct access to cycle
-and insret CSRs only). Note that this legacy value is deprecated and will be
-removed once all user space applications are fixed.
-
-Note that the time CSR is always directly accessible to all modes.
+ Note that the time CSR is always directly accessible to all modes.
pid_max
=======
--
2.47.2
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