lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20250702151823.00007aec@huawei.com>
Date: Wed, 2 Jul 2025 15:18:23 +0100
From: Jonathan Cameron <Jonathan.Cameron@...wei.com>
To: Marc Zyngier <maz@...nel.org>
CC: Lorenzo Pieralisi <lpieralisi@...nel.org>, Thomas Gleixner
	<tglx@...utronix.de>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski
	<krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Catalin Marinas
	<catalin.marinas@....com>, Will Deacon <will@...nel.org>, Arnd Bergmann
	<arnd@...db.de>, Sascha Bischoff <sascha.bischoff@....com>, Timothy Hayes
	<timothy.hayes@....com>, Bjorn Helgaas <bhelgaas@...gle.com>, "Liam R.
 Howlett" <Liam.Howlett@...cle.com>, Peter Maydell <peter.maydell@...aro.org>,
	Mark Rutland <mark.rutland@....com>, Jiri Slaby <jirislaby@...nel.org>,
	<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
	<devicetree@...r.kernel.org>, <linux-pci@...r.kernel.org>
Subject: Re: [PATCH v6 00/31] Arm GICv5: Host driver implementation

On Mon, 30 Jun 2025 18:17:02 +0100
Marc Zyngier <maz@...nel.org> wrote:

> On Thu, 26 Jun 2025 11:25:51 +0100,
> Lorenzo Pieralisi <lpieralisi@...nel.org> wrote:
> > 
> > Implement the irqchip kernel driver for the Arm GICv5 architecture,
> > as described in the GICv5 beta0 specification, available at:
> > 
> > https://developer.arm.com/documentation/aes0070
> > 
> > The GICv5 architecture is composed of multiple components:
> > 
> > - one or more IRS (Interrupt Routing Service)
> > - zero or more ITS (Interrupt Translation Service)
> > - zero or more IWB (Interrupt Wire Bridge)  
> 
> [...]
> 
> I think what is here is pretty solid, and definitely in a better shape
> than the equivalent GICv3 support patches at a similar point in the
> lifetime of the architecture.
> 
> For patches in this series except patch 18:
> 
> Reviewed-by: Marc Zyngier <maz@...nel.org>
> 
> If this goes into 6.17 (which I hope), it'd be good to have this
> series on a stable branch so that we can take the corresponding KVM
> patches[1] independently if they are deemed in a good enough state.
> 
> 	M.
> 
> [1] https://lore.kernel.org/r/20250627100847.1022515-1-sascha.bischoff@arm.com
> 

Agreed. Looks very clean to me.  All the stuff I had was trivial.
I'm only not giving tags (beyond the various field definition patches) because
I don't feel like I have yet spent enough time with the spec yet to be sure about
some aspects (and irq stuff always gives me a headache)  Anyhow for this stuff
my tags are hardly relevant.

As Arnd observed, for now this is very low risk so good to get it into next and
lined up for 6.17 even if a few buglets + fixes surface to go on top.

Jonathan

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ