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Message-ID: <aGVcoT9ChSwXUUq5@e129823.arm.com>
Date: Wed, 2 Jul 2025 17:21:53 +0100
From: Yeoreum Yun <yeoreum.yun@....com>
To: Leo Yan <leo.yan@....com>
Cc: Suzuki K Poulose <suzuki.poulose@....com>,
Mike Leach <mike.leach@...aro.org>,
James Clark <james.clark@...aro.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Yabin Cui <yabinc@...gle.com>, Keita Morisaki <keyz@...gle.com>,
Yuanfang Zhang <quic_yuanfang@...cinc.com>,
coresight@...ts.linaro.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 06/28] coresight: etm4x: Add context synchronization
before enabling trace
> On Wed, Jul 02, 2025 at 12:05:10PM +0100, Yeoreum Yun wrote:
>
> [...]
>
> > > @@ -445,13 +445,37 @@ static int etm4_enable_trace_unit(struct etmv4_drvdata *drvdata)
> > > etm4x_relaxed_write32(csa, TRCRSR_TA, TRCRSR);
> > >
> > > etm4x_allow_trace(drvdata);
> > > +
> > > + /*
> > > + * According to software usage PKLXF in Arm ARM (ARM DDI 0487 L.a),
> > > + * execute a Context synchronization event to guarantee the trace unit
> > > + * will observe the new values of the System registers.
> > > + */
> > > + if (!csa->io_mem)
> > > + isb();
> > > +
> >
> > But, when write to SYS_TRFCR_EL1 in etm4x_allow_trace(), it already does
> > isb(). Is it redundant?
>
> Good point. It is not sufficient. As a system register writing in
> kvm_tracing_set_el1_configuration(), this is why adds a ISB here.
Ah, I missed the write_sysreg_s() doesn't include isb().
Sorry to make noise..
--
Sincerely,
Yeoreum Yun
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