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Message-ID: <CAMuHMdWzGLQwmGep9L0A9bzp5mYybA00W=S2cZnGH0tbMJvzEw@mail.gmail.com>
Date: Wed, 2 Jul 2025 11:03:00 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: John Madieu <john.madieu.xa@...renesas.com>
Cc: magnus.damm@...il.com, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, mturquette@...libre.com, sboyd@...nel.org,
richardcochran@...il.com, prabhakar.mahadev-lad.rj@...renesas.com,
linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
netdev@...r.kernel.org, biju.das.jz@...renesas.com, john.madieu@...il.com
Subject: Re: [PATCH v4 4/4] arm64: dts: renesas: rzg3e-smarc-som: Enable
eth{0-1} (GBETH) interfaces
Hi John,
On Wed, 2 Jul 2025 at 02:57, John Madieu <john.madieu.xa@...renesas.com> wrote:
> Enable the Gigabit Ethernet Interfaces (GBETH) populated on the RZ/G3E SMARC EVK
>
> Signed-off-by: John Madieu <john.madieu.xa@...renesas.com>
> v4:
> - Update pinmux to add OEN support
> - Drops Tb and Rb tags initially collected
Thanks for the update!
> --- a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
> &pinctrl {
> + eth0_pins: eth0 {
> + clk0 {
No need for the 0 ...
> + pinmux = <RZG3E_PORT_PINMUX(B, 1, 1)>; /* TXC */
> + output-enable;
> + };
> +
> + ctrl0 {
... suffixes...
> + eth1_pins: eth1 {
> + clk1 {
... or the 1...
> + pinmux = <RZG3E_PORT_PINMUX(E, 1, 1)>; /* TXC */
> + output-enable;
> + };
> +
> + ctrl1 {
... suffixes.
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-devel for v6.17 with the above fixed.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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