linux-kernel - Re: [PATCH net-next v12 08/14] dpll: zl3073x: Read DPLL types and pin properties from system firmware

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <vpzjeh5kc6s4cpah5wagdy6sm3rzt6vlfyfcdbenppwnzftzow@u4xu7mhzg77u>
Date: Wed, 2 Jul 2025 12:41:40 +0200
From: Jiri Pirko <jiri@...nulli.us>
To: Ivan Vecera <ivecera@...hat.com>
Cc: netdev@...r.kernel.org, Vadim Fedorenko <vadim.fedorenko@...ux.dev>, 
	Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Prathosh Satish <Prathosh.Satish@...rochip.com>, "David S. Miller" <davem@...emloft.net>, 
	Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, 
	Paolo Abeni <pabeni@...hat.com>, Simon Horman <horms@...nel.org>, 
	Jonathan Corbet <corbet@....net>, Jason Gunthorpe <jgg@...pe.ca>, 
	Shannon Nelson <shannon.nelson@....com>, Dave Jiang <dave.jiang@...el.com>, 
	Jonathan Cameron <Jonathan.Cameron@...wei.com>, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-doc@...r.kernel.org, Michal Schmidt <mschmidt@...hat.com>, 
	Petr Oros <poros@...hat.com>
Subject: Re: [PATCH net-next v12 08/14] dpll: zl3073x: Read DPLL types and
 pin properties from system firmware

Sun, Jun 29, 2025 at 09:10:43PM +0200, ivecera@...hat.com wrote:

[...]


>+/**
>+ * zl3073x_prop_dpll_type_get - get DPLL channel type
>+ * @zldev: pointer to zl3073x device
>+ * @index: DPLL channel index
>+ *
>+ * Return: DPLL type for given DPLL channel
>+ */
>+enum dpll_type
>+zl3073x_prop_dpll_type_get(struct zl3073x_dev *zldev, u8 index)
>+{
>+	const char *types[ZL3073X_MAX_CHANNELS];
>+	int count;
>+
>+	/* Read dpll types property from firmware */
>+	count = device_property_read_string_array(zldev->dev, "dpll-types",
>+						  types, ARRAY_SIZE(types));
>+
>+	/* Return default if property or entry for given channel is missing */
>+	if (index >= count)
>+		return DPLL_TYPE_PPS;

Not sure how this embedded stuff works, but isn't better to just bail
out in case this is not present/unknown_value? Why assuming PPS is
correct?


>+
>+	if (!strcmp(types[index], "pps"))
>+		return DPLL_TYPE_PPS;
>+	else if (!strcmp(types[index], "eec"))
>+		return DPLL_TYPE_EEC;
>+
>+	dev_info(zldev->dev, "Unknown DPLL type '%s', using default\n",
>+		 types[index]);
>+
>+	return DPLL_TYPE_PPS; /* Default */
>+}

[...]