linux-kernel - Re: [RFC PATCH V2 06/13] perf: Support SIMD registers

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Message-ID: <69afb239-da54-452d-8ab4-2d80dbdf8dce@sirena.org.uk>
Date: Wed, 2 Jul 2025 12:16:16 +0100
From: Mark Brown <broonie@...nel.org>
To: kan.liang@...ux.intel.com
Cc: peterz@...radead.org, mingo@...hat.com, acme@...nel.org,
	namhyung@...nel.org, tglx@...utronix.de,
	dave.hansen@...ux.intel.com, irogers@...gle.com,
	adrian.hunter@...el.com, jolsa@...nel.org,
	alexander.shishkin@...ux.intel.com, linux-kernel@...r.kernel.org,
	dapeng1.mi@...ux.intel.com, ak@...ux.intel.com, zide.chen@...el.com,
	mark.rutland@....com, ravi.bangoria@....com
Subject: Re: [RFC PATCH V2 06/13] perf: Support SIMD registers

On Thu, Jun 26, 2025 at 12:56:03PM -0700, kan.liang@...ux.intel.com wrote:

>  	 *	{ u64			abi; # enum perf_sample_regs_abi
> -	 *	  u64			regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER
> +	 *	  u64			regs[weight(mask)];
> +	 *	  struct {
> +	 *		u16 nr_vectors;
> +	 *		u16 vector_qwords;
> +	 *		u16 nr_pred;
> +	 *		u16 pred_qwords;
> +	 *		u64 data[nr_vectors * vector_qwords + nr_pred * pred_qwords];
> +	 *	  } && (abi & PERF_SAMPLE_REGS_ABI_SIMD)
> +	 *	} && PERF_SAMPLE_REGS_USER

I'm not super familiar with perf but I think this should work for arm64,
it supplies the vector length through the _qwords and we can handle FFR
being optional by varying the number of predicate registers.

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