linux-kernel - Re: [PATCH net-next v12 07/14] dpll: zl3073x: Add clock

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Message-ID: <e5e3409e-b6a8-4a63-97ac-33e6b1215979@redhat.com>
Date: Wed, 2 Jul 2025 13:43:38 +0200
From: Ivan Vecera <ivecera@...hat.com>
To: Jiri Pirko <jiri@...nulli.us>
Cc: netdev@...r.kernel.org, Vadim Fedorenko <vadim.fedorenko@...ux.dev>,
 Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>,
 Prathosh Satish <Prathosh.Satish@...rochip.com>,
 "David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
 Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
 Simon Horman <horms@...nel.org>, Jonathan Corbet <corbet@....net>,
 Jason Gunthorpe <jgg@...pe.ca>, Shannon Nelson <shannon.nelson@....com>,
 Dave Jiang <dave.jiang@...el.com>,
 Jonathan Cameron <Jonathan.Cameron@...wei.com>, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org,
 Michal Schmidt <mschmidt@...hat.com>, Petr Oros <poros@...hat.com>
Subject: Re: [PATCH net-next v12 07/14] dpll: zl3073x: Add clock_id field

On 02. 07. 25 12:31 odp., Jiri Pirko wrote:
> Sun, Jun 29, 2025 at 09:10:42PM +0200, ivecera@...hat.com wrote:
>> Add .clock_id to zl3073x_dev structure that will be used by later
>> commits introducing DPLL feature. The clock ID is required for DPLL
>> device registration.
>>
>> To generate this ID, use chip ID read during device initialization.
>> In case where multiple zl3073x based chips are present, the chip ID
>> is shifted and lower bits are filled by an unique value - using
>> the I2C device address for I2C connections and the chip-select value
>> for SPI connections.
> 
> You say that multiple chips may have the same chip ID? How is that
> possible? Isn't it supposed to be unique?
> I understand clock ID to be invariant regardless where you plug your
> device. When you construct it from i2c address, sounds wrong.

The chip id is not like serial number but it is like device id under
PCI. So if you will have multiple chips with this chip id you have to
distinguish somehow between them, this is the reason why I2C address
is added into the final value.

Anyway this device does not have any attribute that corresponds to
clock id (as per our previous discussion) and it will be better to NOT
require clock id from DPLL core side.

Ivan