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Message-ID: <87cyaht595.ffs@tglx>
Date: Thu, 03 Jul 2025 21:59:34 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: Michael Kelley <mhklinux@...look.com>, Nam Cao <namcao@...utronix.de>,
 Marc Zyngier <maz@...nel.org>, Lorenzo Pieralisi <lpieralisi@...nel.org>,
 Krzysztof Wilczyński <kwilczynski@...nel.org>, Manivannan
 Sadhasivam <mani@...nel.org>, Rob Herring <robh@...nel.org>, Bjorn Helgaas
 <bhelgaas@...gle.com>, "linux-pci@...r.kernel.org"
 <linux-pci@...r.kernel.org>, "linux-kernel@...r.kernel.org"
 <linux-kernel@...r.kernel.org>, Karthikeyan Mitran
 <m.karthikeyan@...iveil.co.in>, Hou Zhiqiang <Zhiqiang.Hou@....com>,
 Thomas
 Petazzoni <thomas.petazzoni@...tlin.com>, Pali Rohár
 <pali@...nel.org>, "K
 . Y . Srinivasan" <kys@...rosoft.com>, Haiyang Zhang
 <haiyangz@...rosoft.com>, Wei Liu <wei.liu@...nel.org>, Dexuan Cui
 <decui@...rosoft.com>, Joyce Ooi <joyce.ooi@...el.com>, Jim Quinlan
 <jim2101024@...il.com>, Nicolas Saenz Julienne <nsaenz@...nel.org>,
 Florian
 Fainelli <florian.fainelli@...adcom.com>, Broadcom internal kernel review
 list <bcm-kernel-feedback-list@...adcom.com>, Ray Jui <rjui@...adcom.com>,
 Scott Branden <sbranden@...adcom.com>, Ryder Lee <ryder.lee@...iatek.com>,
 Jianjun Wang <jianjun.wang@...iatek.com>, Marek Vasut
 <marek.vasut+renesas@...il.com>, Yoshihiro Shimoda
 <yoshihiro.shimoda.uh@...esas.com>, Michal Simek <michal.simek@....com>,
 Daire McNamara <daire.mcnamara@...rochip.com>, Nirmal Patel
 <nirmal.patel@...ux.intel.com>, Jonathan Derrick
 <jonathan.derrick@...ux.dev>, Matthias Brugger <matthias.bgg@...il.com>,
 AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
 "linux-arm-kernel@...ts.infradead.org"
 <linux-arm-kernel@...ts.infradead.org>, "linux-hyperv@...r.kernel.org"
 <linux-hyperv@...r.kernel.org>, "linux-rpi-kernel@...ts.infradead.org"
 <linux-rpi-kernel@...ts.infradead.org>,
 "linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>,
 "linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>
Subject: RE: [PATCH 14/16] PCI: hv: Switch to msi_create_parent_irq_domain()

On Thu, Jul 03 2025 at 17:41, Michael Kelley wrote:
> From: Nam Cao <namcao@...utronix.de> Sent: Thursday, June 26, 2025 7:48 AM
>> 
>> Move away from the legacy MSI domain setup, switch to use
>> msi_create_parent_irq_domain().
>
> From a build standpoint, this patch does not apply cleanly to
> linux-next20250630. See also an issue below where a needed irq
> function isn't exported.

Does it conflict against the PCI tree?

> At runtime, I've done basic smoke testing on an x86 VM in the Azure
> cloud that has a Mellanox NIC VF and two NVMe devices as PCI devices.
> So far everything looks good. But I'm still doing additional testing, and
> I want to also test on an ARM64 VM. Please give me another day or two
> to be completely satisfied.

Sure.
>> +static void hv_pcie_domain_free(struct irq_domain *d, unsigned int virq, unsigned int nr_irqs)
>> +{
>> +	struct msi_domain_info *info = d->host_data;
>> +
>> +	for (int i = 0; i < nr_irqs; i++)
>> +		hv_msi_free(d, info, virq + i);
>> +
>> +	irq_domain_free_irqs_top(d, virq, nr_irqs);
>
> This code can be built as a module, so irq_domain_free_irqs_top() needs to be
> exported, which it currently is not.

Nam, can you please create a seperate patch, which exports this and take
care of the conflict?

Thanks,

        tglx

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