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Message-ID: <7efcc980-1be3-4f25-a216-33e1d6a23ef3@redhat.com>
Date: Thu, 3 Jul 2025 10:09:27 +0200
From: David Hildenbrand <david@...hat.com>
To: Aboorva Devarajan <aboorvad@...ux.ibm.com>, akpm@...ux-foundation.org,
Liam.Howlett@...cle.com, lorenzo.stoakes@...cle.com, shuah@...nel.org,
pfalcato@...e.de, ziy@...dia.com, baolin.wang@...ux.alibaba.com,
npache@...hat.com, ryan.roberts@....com, dev.jain@....com, baohua@...nel.org
Cc: linux-mm@...ck.org, linux-kselftest@...r.kernel.org,
linux-kernel@...r.kernel.org, donettom@...ux.ibm.com, ritesh.list@...il.com
Subject: Re: [PATCH v2 2/7] selftests/mm: Add support to test 4PB VA on PPC64
On 03.07.25 08:06, Aboorva Devarajan wrote:
> From: Donet Tom <donettom@...ux.ibm.com>
>
> PowerPC64 supports a 4PB virtual address space, but this test was
> previously limited to 512TB. This patch extends the coverage up to
> the full 4PB VA range on PowerPC64.
>
> Memory from 0 to 128TB is allocated without an address hint, while
> allocations from 128TB to 4PB use a hint address.
>
> Signed-off-by: Donet Tom <donettom@...ux.ibm.com>
> Signed-off-by: Aboorva Devarajan <aboorvad@...ux.ibm.com>
Comment applies to all patches in this series:
See Documentation/process/submitting-patches.rst, in particular "Example
of a patch submitted by a Co-developed-by: author::"
If you are a co-developer of any of these patches (and not simply resend
them without touching them), you should have a
Co-developed-by: Aboorva Devarajan <aboorvad@...ux.ibm.com>
above your Signed-off-by
> ---
> tools/testing/selftests/mm/virtual_address_range.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/tools/testing/selftests/mm/virtual_address_range.c b/tools/testing/selftests/mm/virtual_address_range.c
> index e24c36a39f22..619acf0b9239 100644
> --- a/tools/testing/selftests/mm/virtual_address_range.c
> +++ b/tools/testing/selftests/mm/virtual_address_range.c
> @@ -50,6 +50,7 @@
> #define NR_CHUNKS_256TB (NR_CHUNKS_128TB * 2UL)
> #define NR_CHUNKS_384TB (NR_CHUNKS_128TB * 3UL)
> #define NR_CHUNKS_3840TB (NR_CHUNKS_128TB * 30UL)
> +#define NR_CHUNKS_3968TB (NR_CHUNKS_128TB * 31UL)
>
> #define ADDR_MARK_128TB (1UL << 47) /* First address beyond 128TB */
> #define ADDR_MARK_256TB (1UL << 48) /* First address beyond 256TB */
> @@ -59,6 +60,11 @@
> #define HIGH_ADDR_SHIFT 49
> #define NR_CHUNKS_LOW NR_CHUNKS_256TB
> #define NR_CHUNKS_HIGH NR_CHUNKS_3840TB
> +#elif defined(__PPC64__)
> +#define HIGH_ADDR_MARK ADDR_MARK_128TB
> +#define HIGH_ADDR_SHIFT 48
> +#define NR_CHUNKS_LOW NR_CHUNKS_128TB
> +#define NR_CHUNKS_HIGH NR_CHUNKS_3968TB
> #else
> #define HIGH_ADDR_MARK ADDR_MARK_128TB
> #define HIGH_ADDR_SHIFT 48
Acked-by: David Hildenbrand <david@...hat.com>
--
Cheers,
David / dhildenb
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