[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAMuHMdVvxebkm9A4g9hADww=9zREXJqyW3eQ6tFVwVJvkUkEOw@mail.gmail.com>
Date: Thu, 3 Jul 2025 11:55:49 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Prabhakar <prabhakar.csengg@...il.com>
Cc: Magnus Damm <magnus.damm@...il.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Biju Das <biju.das.jz@...renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH 3/6] arm64: dts: renesas: r9a09g077: Add SDHI nodes
Hi Prabhakar,
On Wed, 25 Jun 2025 at 17:31, Prabhakar <prabhakar.csengg@...il.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Add SDHI0-SDHI1 nodes to RZ/T2H ("R9A09G077") SoC DTSI.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Thanks for your patch!
> --- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
> @@ -155,6 +155,46 @@ gic: interrupt-controller@...00000 {
> interrupt-controller;
> interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
> };
> +
> + sdhi0: mmc@...80000 {
> + compatible = "renesas,sdhi-r9a09g077",
> + "renesas,sdhi-r9a09g057";
> + reg = <0x0 0x92080000 0 0x10000>;
> + interrupts = <GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 783 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1212>,
1112?
> + <&cpg CPG_CORE R9A09G077_SDHI_CLKHS>;
> + clock-names = "aclk", "clkh";
> + power-domains = <&cpg>;
> + status = "disabled";
> +
> + sdhi0_vqmmc: vqmmc-regulator {
> + regulator-name = "SDHI0-VQMMC";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + status = "disabled";
> + };
> + };
> +
> + sdhi1: mmc@...90000 {
> + compatible = "renesas,sdhi-r9a09g077",
> + "renesas,sdhi-r9a09g057";
> + reg = <0x0 0x92090000 0 0x10000>;
> + interrupts = <GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1213>,
1113?
> + <&cpg CPG_CORE R9A09G077_SDHI_CLKHS>;
> + clock-names = "aclk", "clkh";
> + power-domains = <&cpg>;
> + status = "disabled";
> +
> + sdhi1_vqmmc: vqmmc-regulator {
> + regulator-name = "SDHI1-VQMMC";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + status = "disabled";
> + };
> + };
> };
>
The rest LGTM.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Powered by blists - more mailing lists