linux-kernel - [PATCH 8/8] riscv: defconfig: enable Andes SoC

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Message-ID: <20250704081451.2011407-9-ben717@andestech.com>
Date: Fri, 4 Jul 2025 16:14:51 +0800
From: Ben Zong-You Xie <ben717@...estech.com>
To:
CC: <arnd@...db.de>, <paul.walmsley@...ive.com>, <palmer@...belt.com>,
        <aou@...s.berkeley.edu>, <alex@...ti.fr>, <robh@...nel.org>,
        <krzk+dt@...nel.org>, <conor+dt@...nel.org>, <tglx@...utronix.de>,
        <daniel.lezcano@...aro.org>, <prabhakar.mahadev-lad.rj@...renesas.com>,
        <devicetree@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <soc@...ts.linux.dev>,
        <tim609@...estech.com>, Ben Zong-You Xie <ben717@...estech.com>,
        Conor Dooley
	<conor.dooley@...rochip.com>
Subject: [PATCH 8/8] riscv: defconfig: enable Andes SoC

Enable Andes SoC config in defconfig to allow the default
upstream kernel to boot on Voyager board.

Acked-by: Conor Dooley <conor.dooley@...rochip.com>
Signed-off-by: Ben Zong-You Xie <ben717@...estech.com>
---
 arch/riscv/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index fe8bd8afb418..12f5f6ec00fa 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -22,6 +22,7 @@ CONFIG_USER_NS=y
 CONFIG_CHECKPOINT_RESTORE=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_PROFILING=y
+CONFIG_ARCH_ANDES=y
 CONFIG_ARCH_MICROCHIP=y
 CONFIG_ARCH_SIFIVE=y
 CONFIG_ARCH_SOPHGO=y
-- 
2.34.1