linux-kernel - Re: [PATCH v2] iommu/arm-smmu: disable PRR on SM8250

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Message-ID: <CAO9ioeX0ffO8-v-mZaefFbyjOcCqGyu++gFjaMkpHPMyVOwE_Q@mail.gmail.com>
Date: Sun, 6 Jul 2025 19:38:29 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: rob.clark@....qualcomm.com
Cc: Akhil P Oommen <akhilpo@....qualcomm.com>, Will Deacon <will@...nel.org>,
        Robin Murphy <robin.murphy@....com>, Joerg Roedel <joro@...tes.org>,
        Bibek Kumar Patro <quic_bibekkum@...cinc.com>, iommu@...ts.linux.dev,
        linux-arm-msm@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, Connor Abbott <cwabbott0@...il.com>
Subject: Re: [PATCH v2] iommu/arm-smmu: disable PRR on SM8250

On Sun, 6 Jul 2025 at 18:20, Rob Clark <rob.clark@....qualcomm.com> wrote:
>
> On Sun, Jul 6, 2025 at 7:22 AM Akhil P Oommen <akhilpo@....qualcomm.com> wrote:
> >
> > On 7/5/2025 9:38 PM, Dmitry Baryshkov wrote:
> > > On SM8250 / QRB5165-RB5 using PRR bits resets the device, most likely
> > > because of the hyp limitations. Disable PRR support on that platform.
> > >
> > > Fixes: 7f2ef1bfc758 ("iommu/arm-smmu: Add support for PRR bit setup")
> > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
> >
> > Reviewed-by: Akhil P Oommen <akhilpo@....qualcomm.com>
> >
> > Unfortunately, there is no way to detect firmware support for PRR safely
> > from KMD.
>
> I still am a bit curious about whether it is the ACLTR write that
> trips the fw out (doubtful, since we write other bits in that reg
> AFAICT) or the PRR_CFG_LADDR/UADDR write that does it.

Indeed, write to ACTLR seems to go through, writes (or reads) to
PRR_CFG_[LU]ADDR cause a reset.

> In the latter
> case we could potentially use a reserved-region for the PRR page,
> instead of dynamically allocating it (if we knew what values are in
> LADDR/UADDR.. I guess 0x0?) to avoid reduced vk functionality on these
> devices.  AFAIU the vk extensions that depend on PRR are required for
> vkd3d.


-- 
With best wishes
Dmitry