linux-kernel - Re: [PATCH] arm64: dts: lx2160a-qds: add the two on-board RGMII PHYs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <aG1d6uwjGJWQqZ/C@lizhi-Precision-Tower-5810>
Date: Tue, 8 Jul 2025 14:05:30 -0400
From: Frank Li <Frank.li@....com>
To: Ioana Ciornei <ioana.ciornei@....com>
Cc: Shawn Guo <shawnguo@...nel.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: lx2160a-qds: add the two on-board RGMII PHYs

On Mon, Jul 07, 2025 at 06:33:31PM +0300, Ioana Ciornei wrote:
> Describe the two LX2160AQDS on-board RGMII PHYs on their respective MDIO
> buses behind the MDIO multiplexer.
>
> Signed-off-by: Ioana Ciornei <ioana.ciornei@....com>
> ---

Reviewed-by: Frank Li <Frank.Li@....com>

>  .../boot/dts/freescale/fsl-lx2160a-qds.dts    | 20 +++++++++++++++++++
>  1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> index 4d721197d837..2d01e20b47e7 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> @@ -43,12 +43,22 @@ mdio@0 { /* On-board PHY #1 RGMI1*/
>  			reg = <0x00>;
>  			#address-cells = <1>;
>  			#size-cells = <0>;
> +
> +			rgmii_phy1: ethernet-phy@1 {
> +				compatible = "ethernet-phy-id001c.c916";
> +				reg = <0x1>;
> +			};
>  		};
>
>  		mdio@8 { /* On-board PHY #2 RGMI2*/
>  			reg = <0x8>;
>  			#address-cells = <1>;
>  			#size-cells = <0>;
> +
> +			rgmii_phy2: ethernet-phy@2 {
> +				compatible = "ethernet-phy-id001c.c916";
> +				reg = <0x2>;
> +			};
>  		};
>
>  		mdio@18 { /* Slot #1 */
> @@ -169,6 +179,16 @@ &crypto {
>  	status = "okay";
>  };
>
> +&dpmac17 {
> +	phy-handle = <&rgmii_phy1>;
> +	phy-connection-type = "rgmii-id";
> +};
> +
> +&dpmac18 {
> +	phy-handle = <&rgmii_phy2>;
> +	phy-connection-type = "rgmii-id";
> +};
> +
>  &dspi0 {
>  	status = "okay";
>
> --
> 2.25.1
>