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Message-ID: <175199883657.406.13466161153295191439.tip-bot2@tip-bot2>
Date: Tue, 08 Jul 2025 18:20:36 -0000
From: "irqchip-bot for Lorenzo Pieralisi" <tip-bot2@...utronix.de>
To: linux-kernel@...r.kernel.org
Cc: Lorenzo Pieralisi <lpieralisi@...nel.org>,
 Jonathan Cameron <Jonathan.Cameron@...wei.com>, Marc Zyngier <maz@...nel.org>,
 Will Deacon <will@...nel.org>, Catalin Marinas <catalin.marinas@....com>,
 tglx@...utronix.de
Subject: [irqchip: irq/irqchip-next] arm64/sysreg: Add ICC_IDR0_EL1

The following commit has been merged into the irq/irqchip-next branch of irqchip:

Commit-ID:     f987581aa78ee4bba5fd1b83296f4a6ddd228c79
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/f987581aa78ee4bba5fd1b83296f4a6ddd228c79
Author:        Lorenzo Pieralisi <lpieralisi@...nel.org>
AuthorDate:    Thu, 03 Jul 2025 12:25:01 +02:00
Committer:     Marc Zyngier <maz@...nel.org>
CommitterDate: Tue, 08 Jul 2025 18:35:51 +01:00

arm64/sysreg: Add ICC_IDR0_EL1

Add ICC_IDR0_EL1 register description.

Signed-off-by: Lorenzo Pieralisi <lpieralisi@...nel.org>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>
Reviewed-by: Marc Zyngier <maz@...nel.org>
Cc: Will Deacon <will@...nel.org>
Cc: Catalin Marinas <catalin.marinas@....com>
Cc: Marc Zyngier <maz@...nel.org>
Acked-by: Catalin Marinas <catalin.marinas@....com>
Link: https://lore.kernel.org/r/20250703-gicv5-host-v7-11-12e71f1b3528@kernel.org
Signed-off-by: Marc Zyngier <maz@...nel.org>
---
 arch/arm64/tools/sysreg | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 5e15d69..8be5e4a 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -3099,6 +3099,22 @@ Sysreg	ICC_PPI_HMR1_EL1	3	0	12	10	1
 Fields ICC_PPI_HMRx_EL1
 EndSysreg
 
+Sysreg	ICC_IDR0_EL1	3	0	12	10	2
+Res0	63:12
+UnsignedEnum	11:8	GCIE_LEGACY
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+UnsignedEnum	7:4	PRI_BITS
+	0b0011	4BITS
+	0b0100	5BITS
+EndEnum
+UnsignedEnum	3:0	ID_BITS
+	0b0000	16BITS
+	0b0001	24BITS
+EndEnum
+EndSysreg
+
 Sysreg	ICC_ICSR_EL1	3	0	12	10	4
 Res0	63:48
 Field	47:32	IAFFID

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