| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <e48c2706-86cf-4e1d-bfad-17f662f5fb75@lanxincomputing.com>
Date: Tue, 8 Jul 2025 11:21:16 +0800
From: "Nutty Liu" <liujingqi@...xincomputing.com>
To: "Han Gao" <rabenda.cn@...il.com>, <devicetree@...r.kernel.org>
Cc: "Rob Herring" <robh@...nel.org>,
"Krzysztof Kozlowski" <krzk+dt@...nel.org>,
"Conor Dooley" <conor+dt@...nel.org>,
"Paul Walmsley" <paul.walmsley@...ive.com>,
"Palmer Dabbelt" <palmer@...belt.com>,
"Albert Ou" <aou@...s.berkeley.edu>, "Alexandre Ghiti" <alex@...ti.fr>,
"Chen Wang" <unicorn_wang@...look.com>,
"Inochi Amaoto" <inochiama@...il.com>,
"Thomas Bonnefille" <thomas.bonnefille@...tlin.com>,
"Guo Ren" <guoren@...nel.org>, "Chao Wei" <chao.wei@...hgo.com>,
<linux-riscv@...ts.infradead.org>, <sophgo@...ts.linux.dev>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 3/3] riscv: dts: sophgo: add Sophgo SG2042_EVB_V2.0 board device tree
On 7/5/2025 3:39 PM, Han Gao wrote:
> Sophgo SG2042_EVB_V2.0 [1] is a prototype development board based on SG2042
>
> Currently supports serial port, sdcard/emmc, pwm, fan speed control.
>
> Link: https://github.com/sophgo/sophgo-hardware/tree/master/SG2042/SG2042-x4-EVB [1]
>
> Signed-off-by: Han Gao <rabenda.cn@...il.com>
Reviewed-by: Nutty Liu<liujingqi@...xincomputing.com>
Thanks,
Nutty
> ---
> arch/riscv/boot/dts/sophgo/Makefile | 1 +
> arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts | 233 +++++++++++++++++++
> 2 files changed, 234 insertions(+)
> create mode 100644 arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts
>
> diff --git a/arch/riscv/boot/dts/sophgo/Makefile b/arch/riscv/boot/dts/sophgo/Makefile
> index 6c9b29681cad..6f65526d4193 100644
> --- a/arch/riscv/boot/dts/sophgo/Makefile
> +++ b/arch/riscv/boot/dts/sophgo/Makefile
> @@ -4,4 +4,5 @@ dtb-$(CONFIG_ARCH_SOPHGO) += cv1812h-huashan-pi.dtb
> dtb-$(CONFIG_ARCH_SOPHGO) += sg2002-licheerv-nano-b.dtb
> dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-milkv-pioneer.dtb
> dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-evb-v1.dtb
> +dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-evb-v2.dtb
> dtb-$(CONFIG_ARCH_SOPHGO) += sg2044-sophgo-srd3-10.dtb
> diff --git a/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts b/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts
> new file mode 100644
> index 000000000000..46980e41b886
> --- /dev/null
> +++ b/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts
> @@ -0,0 +1,233 @@
> +// SPDX-License-Identifier: GPL-2.0 OR MIT
> +/*
> + * Copyright (C) 2025 Sophgo Technology Inc. All rights reserved.
> + */
> +
> +#include "sg2042.dtsi"
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +
> +/ {
> + model = "Sophgo SG2042 EVB V2.0";
> + compatible = "sophgo,sg2042-evb-v2", "sophgo,sg2042";
> +
> + chosen {
> + stdout-path = "serial0";
> + };
> +
> + pwmfan: pwm-fan {
> + compatible = "pwm-fan";
> + cooling-levels = <103 128 179 230 255>;
> + pwms = <&pwm 0 40000 0>;
> + #cooling-cells = <2>;
> + };
> +
> + thermal-zones {
> + soc-thermal {
> + polling-delay-passive = <1000>;
> + polling-delay = <1000>;
> + thermal-sensors = <&mcu 0>;
> +
> + trips {
> + soc_active1: soc-active1 {
> + temperature = <30000>;
> + hysteresis = <8000>;
> + type = "active";
> + };
> +
> + soc_active2: soc-active2 {
> + temperature = <58000>;
> + hysteresis = <12000>;
> + type = "active";
> + };
> +
> + soc_active3: soc-active3 {
> + temperature = <70000>;
> + hysteresis = <10000>;
> + type = "active";
> + };
> +
> + soc_hot: soc-hot {
> + temperature = <80000>;
> + hysteresis = <5000>;
> + type = "hot";
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&soc_active1>;
> + cooling-device = <&pwmfan 0 1>;
> + };
> +
> + map1 {
> + trip = <&soc_active2>;
> + cooling-device = <&pwmfan 1 2>;
> + };
> +
> + map2 {
> + trip = <&soc_active3>;
> + cooling-device = <&pwmfan 2 3>;
> + };
> +
> + map3 {
> + trip = <&soc_hot>;
> + cooling-device = <&pwmfan 3 4>;
> + };
> + };
> + };
> +
> + board-thermal {
> + polling-delay-passive = <1000>;
> + polling-delay = <1000>;
> + thermal-sensors = <&mcu 1>;
> +
> + trips {
> + board_active: board-active {
> + temperature = <75000>;
> + hysteresis = <8000>;
> + type = "active";
> + };
> + };
> +
> + cooling-maps {
> + map4 {
> + trip = <&board_active>;
> + cooling-device = <&pwmfan 3 4>;
> + };
> + };
> + };
> + };
> +};
> +
> +&cgi_main {
> + clock-frequency = <25000000>;
> +};
> +
> +&cgi_dpll0 {
> + clock-frequency = <25000000>;
> +};
> +
> +&cgi_dpll1 {
> + clock-frequency = <25000000>;
> +};
> +
> +&emmc {
> + pinctrl-0 = <&emmc_cfg>;
> + pinctrl-names = "default";
> + bus-width = <4>;
> + no-sdio;
> + no-sd;
> + non-removable;
> + wp-inverted;
> + status = "okay";
> +};
> +
> +&i2c1 {
> + pinctrl-0 = <&i2c1_cfg>;
> + pinctrl-names = "default";
> + status = "okay";
> +
> + mcu: syscon@17 {
> + compatible = "sophgo,sg2042-hwmon-mcu";
> + reg = <0x17>;
> + #thermal-sensor-cells = <1>;
> + };
> +};
> +
> +&gmac0 {
> + phy-handle = <&phy0>;
> + phy-mode = "rgmii-id";
> + status = "okay";
> +
> + mdio {
> + phy0: phy@0 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <0>;
> + reset-gpios = <&port0a 27 GPIO_ACTIVE_LOW>;
> + reset-assert-us = <100000>;
> + reset-deassert-us = <100000>;
> + };
> + };
> +};
> +
> +&pinctrl {
> + emmc_cfg: sdhci-emmc-cfg {
> + sdhci-emmc-wp-pins {
> + pinmux = <PINMUX(PIN_EMMC_WP, 0)>;
> + bias-disable;
> + drive-strength-microamp = <26800>;
> + input-schmitt-disable;
> + };
> +
> + sdhci-emmc-cd-pins {
> + pinmux = <PINMUX(PIN_EMMC_CD, 0)>;
> + bias-pull-up;
> + drive-strength-microamp = <26800>;
> + input-schmitt-enable;
> + };
> +
> + sdhci-emmc-rst-pwr-pins {
> + pinmux = <PINMUX(PIN_EMMC_RST, 0)>,
> + <PINMUX(PIN_EMMC_PWR_EN, 0)>;
> + bias-disable;
> + drive-strength-microamp = <26800>;
> + input-schmitt-disable;
> + };
> + };
> +
> + i2c1_cfg: i2c1-cfg {
> + i2c1-pins {
> + pinmux = <PINMUX(PIN_IIC1_SDA, 0)>,
> + <PINMUX(PIN_IIC1_SCL, 0)>;
> + bias-pull-up;
> + drive-strength-microamp = <26800>;
> + input-schmitt-enable;
> + };
> + };
> +
> + sd_cfg: sdhci-sd-cfg {
> + sdhci-sd-cd-wp-pins {
> + pinmux = <PINMUX(PIN_SDIO_CD, 0)>,
> + <PINMUX(PIN_SDIO_WP, 0)>;
> + bias-pull-up;
> + drive-strength-microamp = <26800>;
> + input-schmitt-enable;
> + };
> +
> + sdhci-sd-rst-pwr-pins {
> + pinmux = <PINMUX(PIN_SDIO_RST, 0)>,
> + <PINMUX(PIN_SDIO_PWR_EN, 0)>;
> + bias-disable;
> + drive-strength-microamp = <26800>;
> + input-schmitt-disable;
> + };
> + };
> +
> + uart0_cfg: uart0-cfg {
> + uart0-rx-pins {
> + pinmux = <PINMUX(PIN_UART0_TX, 0)>,
> + <PINMUX(PIN_UART0_RX, 0)>;
> + bias-pull-up;
> + drive-strength-microamp = <26800>;
> + input-schmitt-enable;
> + };
> + };
> +};
> +
> +&sd {
> + pinctrl-0 = <&sd_cfg>;
> + pinctrl-names = "default";
> + bus-width = <4>;
> + no-sdio;
> + no-mmc;
> + wp-inverted;
> + status = "okay";
> +};
> +
> +&uart0 {
> + pinctrl-0 = <&uart0_cfg>;
> + pinctrl-names = "default";
> + status = "okay";
> +};
Powered by blists - more mailing lists