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Message-ID: <20250708084252.1028191-5-c-vankar@ti.com>
Date: Tue, 8 Jul 2025 14:12:52 +0530
From: Chintan Vankar <c-vankar@...com>
To: Conor Dooley <conor+dt@...nel.org>,
Krzysztof Kozlowski
<krzk+dt@...nel.org>,
Rob Herring <robh@...nel.org>, Tero Kristo
<kristo@...nel.org>,
Vignesh Raghavendra <vigneshr@...com>, Nishanth Menon
<nm@...com>,
<c-vankar@...com>
CC: <s-vadapalli@...com>, <linux-kernel@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>
Subject: [PATCH v5 4/4] arm64: dts: ti: k3-am69-sk: Add bootph-all property to enable Ethernet boot
Ethernet boot requires CPSW nodes to be present starting from R5 SPL
stage. Add bootph-all property to required nodes to enable Ethernet boot
for SK-AM69.
Signed-off-by: Chintan Vankar <c-vankar@...com>
---
This patch is introduced new from this version.
arch/arm64/boot/dts/ti/k3-am69-sk.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
index f28375629739..a1a16151015e 100644
--- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
@@ -568,6 +568,7 @@ J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E38) MCU_RGMII1_TD3 */
J784S4_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (E36) MCU_RGMII1_TXC */
J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (C38) MCU_RGMII1_TX_CTL */
>;
+ booph-all;
};
mcu_mdio_pins_default: mcu-mdio-default-pins {
@@ -575,6 +576,7 @@ mcu_mdio_pins_default: mcu-mdio-default-pins {
J784S4_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A36) MCU_MDIO0_MDC */
J784S4_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */
>;
+ bootph-all;
};
mcu_rpi_hdr1_gpio0_pins_default: mcu-rpi-hdr1-gpio0-default-pins {
@@ -630,6 +632,14 @@ J784S4_WKUP_IOPAD(0x0, PIN_INPUT, 7) /* (M33) WKUP_GPIO0_49 */
};
};
+&phy_gmii_sel {
+ bootph-all;
+};
+
+&mcu_udmap {
+ bootph-all;
+};
+
&mailbox0_cluster0 {
status = "okay";
interrupts = <436>;
@@ -968,6 +978,7 @@ &mcu_cpsw {
&davinci_mdio {
mcu_phy0: ethernet-phy@0 {
reg = <0>;
+ bootph-all;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,min-output-impedance;
@@ -978,6 +989,7 @@ &mcu_cpsw_port1 {
status = "okay";
phy-mode = "rgmii-rxid";
phy-handle = <&mcu_phy0>;
+ bootph-all;
};
&mcu_r5fss0_core0 {
--
2.34.1
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