[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20250708103208.79444-6-vivek.2311@samsung.com>
Date: Tue, 8 Jul 2025 16:02:07 +0530
From: Vivek Yadav <vivek.2311@...sung.com>
To: pankaj.dubey@...sung.com, ravi.patel@...sung.com, shradha.t@...sung.com,
mturquette@...libre.com, sboyd@...nel.org, robh@...nel.org, krzk@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org, will@...nel.org,
mark.rutland@....com, s.nawrocki@...sung.com, cw00.choi@...sung.com,
alim.akhtar@...sung.com, linux-fsd@...la.com
Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-perf-users@...r.kernel.org, linux-samsung-soc@...r.kernel.org, Vivek
Yadav <vivek.2311@...sung.com>
Subject: [PATCH 5/6] arm64: dts: fsd: Add PPMU support for MFC block of FSD
SoC
Add device tree node for PPMU instances in MFC block and
enable the same for Tesla FSD platform.
Signed-off-by: Ravi Patel <ravi.patel@...sung.com>
Signed-off-by: Vivek Yadav <vivek.2311@...sung.com>
---
arch/arm64/boot/dts/tesla/fsd-evb.dts | 8 ++++++++
arch/arm64/boot/dts/tesla/fsd.dtsi | 20 ++++++++++++++++++++
2 files changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts
index 8d7794642900..f543c7dad7cc 100644
--- a/arch/arm64/boot/dts/tesla/fsd-evb.dts
+++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts
@@ -110,3 +110,11 @@ &serial_0 {
&ufs {
status = "okay";
};
+
+&ppmu0_mfc {
+ status = "okay";
+};
+
+&ppmu1_mfc {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi
index 690b4ed9c29b..7b6e7d81be10 100644
--- a/arch/arm64/boot/dts/tesla/fsd.dtsi
+++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
@@ -970,6 +970,26 @@ timer@...40000 {
clock-names = "fin_pll", "mct";
};
+ ppmu0_mfc: ppmu@...40000 {
+ compatible = "samsung,ppmu-v2";
+ reg = <0x0 0x12840000 0x0 0x1000>;
+ interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_mfc MFC_PPMU_MFCD0_IPCLKPORT_ACLK>,
+ <&clock_mfc MFC_PPMU_MFCD0_IPCLKPORT_PCLK>;
+ clock-names = "aclk", "pclk";
+ };
+
+ ppmu1_mfc: ppmu@...50000 {
+ compatible = "samsung,ppmu-v2";
+ reg = <0x0 0x12850000 0x0 0x1000>;
+ interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_mfc MFC_PPMU_MFCD1_IPCLKPORT_ACLK>,
+ <&clock_mfc MFC_PPMU_MFCD1_IPCLKPORT_PCLK>;
+ clock-names = "aclk", "pclk";
+ };
+
mfc: mfc@...80000 {
compatible = "tesla,fsd-mfc";
reg = <0x0 0x12880000 0x0 0x10000>;
--
2.49.0
Powered by blists - more mailing lists