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Message-ID: <20250709160819.306875-8-prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Wed, 9 Jul 2025 17:08:19 +0100
From: Prabhakar <prabhakar.csengg@...il.com>
To: Geert Uytterhoeven <geert+renesas@...der.be>,
Linus Walleij <linus.walleij@...aro.org>
Cc: linux-renesas-soc@...r.kernel.org,
linux-gpio@...r.kernel.org,
linux-kernel@...r.kernel.org,
Prabhakar <prabhakar.csengg@...il.com>,
Biju Das <biju.das.jz@...renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
John Madieu <john.madieu.xa@...renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: [PATCH v2 7/7] pinctrl: renesas: rzg2l: Drop oen_read and oen_write callbacks
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Remove oen_read and oen_write callbacks from rzg2l_pinctrl_data as
all SoCs now use the same rzg2l_read_oen() and rzg2l_write_oen()
functions directly.
Change rzg2l_read_oen() return type to int for proper error reporting
and update callers to handle errors consistently.
This simplifies the code by removing redundant callbacks and ensures
uniform OEN handling across all supported SoCs.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
---
drivers/pinctrl/renesas/pinctrl-rzg2l.c | 35 +++++++------------------
1 file changed, 9 insertions(+), 26 deletions(-)
diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index a6580d06db13..1e4fc4be6713 100644
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -298,8 +298,6 @@ struct rzg2l_pinctrl_data {
void (*pwpr_pfc_lock_unlock)(struct rzg2l_pinctrl *pctrl, bool lock);
void (*pmc_writeb)(struct rzg2l_pinctrl *pctrl, u8 val, u16 offset);
int (*pin_to_oen_bit)(struct rzg2l_pinctrl *pctrl, unsigned int _pin);
- u32 (*oen_read)(struct rzg2l_pinctrl *pctrl, unsigned int _pin);
- int (*oen_write)(struct rzg2l_pinctrl *pctrl, unsigned int _pin, u8 oen);
int (*hw_to_bias_param)(unsigned int val);
int (*bias_param_to_hw)(enum pin_config_param param);
};
@@ -1092,15 +1090,15 @@ static int rzg2l_pin_to_oen_bit(struct rzg2l_pinctrl *pctrl, unsigned int _pin)
return -EINVAL;
}
-static u32 rzg2l_read_oen(struct rzg2l_pinctrl *pctrl, unsigned int _pin)
+static int rzg2l_read_oen(struct rzg2l_pinctrl *pctrl, unsigned int _pin)
{
int bit;
if (!pctrl->data->pin_to_oen_bit)
- return 0;
+ return -EOPNOTSUPP;
bit = pctrl->data->pin_to_oen_bit(pctrl, _pin);
if (bit < 0)
- return 0;
+ return -EINVAL;
return !(readb(pctrl->base + pctrl->data->hwcfg->regs.oen) & BIT(bit));
}
@@ -1114,7 +1112,7 @@ static int rzg2l_write_oen(struct rzg2l_pinctrl *pctrl, unsigned int _pin, u8 oe
int bit;
if (!pctrl->data->pin_to_oen_bit)
- return -EINVAL;
+ return -EOPNOTSUPP;
bit = pctrl->data->pin_to_oen_bit(pctrl, _pin);
if (bit < 0)
return -EINVAL;
@@ -1296,11 +1294,10 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev,
case PIN_CONFIG_OUTPUT_ENABLE:
if (!(cfg & PIN_CFG_OEN))
return -EINVAL;
- if (!pctrl->data->oen_read)
- return -EOPNOTSUPP;
- arg = pctrl->data->oen_read(pctrl, _pin);
- if (!arg)
- return -EINVAL;
+ ret = rzg2l_read_oen(pctrl, _pin);
+ if (ret < 0)
+ return ret;
+ arg = ret;
break;
case PIN_CONFIG_POWER_SOURCE:
@@ -1459,9 +1456,7 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev,
case PIN_CONFIG_OUTPUT_ENABLE:
if (!(cfg & PIN_CFG_OEN))
return -EINVAL;
- if (!pctrl->data->oen_write)
- return -EOPNOTSUPP;
- ret = pctrl->data->oen_write(pctrl, _pin, !!arg);
+ ret = rzg2l_write_oen(pctrl, _pin, !!arg);
if (ret)
return ret;
break;
@@ -3298,8 +3293,6 @@ static struct rzg2l_pinctrl_data r9a07g043_data = {
.pwpr_pfc_lock_unlock = &rzg2l_pwpr_pfc_lock_unlock,
.pmc_writeb = &rzg2l_pmc_writeb,
.pin_to_oen_bit = &rzg2l_pin_to_oen_bit,
- .oen_read = &rzg2l_read_oen,
- .oen_write = &rzg2l_write_oen,
.hw_to_bias_param = &rzg2l_hw_to_bias_param,
.bias_param_to_hw = &rzg2l_bias_param_to_hw,
};
@@ -3316,8 +3309,6 @@ static struct rzg2l_pinctrl_data r9a07g044_data = {
.pwpr_pfc_lock_unlock = &rzg2l_pwpr_pfc_lock_unlock,
.pmc_writeb = &rzg2l_pmc_writeb,
.pin_to_oen_bit = &rzg2l_pin_to_oen_bit,
- .oen_read = &rzg2l_read_oen,
- .oen_write = &rzg2l_write_oen,
.hw_to_bias_param = &rzg2l_hw_to_bias_param,
.bias_param_to_hw = &rzg2l_bias_param_to_hw,
};
@@ -3333,8 +3324,6 @@ static struct rzg2l_pinctrl_data r9a08g045_data = {
.pwpr_pfc_lock_unlock = &rzg2l_pwpr_pfc_lock_unlock,
.pmc_writeb = &rzg2l_pmc_writeb,
.pin_to_oen_bit = &rzg3s_pin_to_oen_bit,
- .oen_read = &rzg2l_read_oen,
- .oen_write = &rzg2l_write_oen,
.hw_to_bias_param = &rzg2l_hw_to_bias_param,
.bias_param_to_hw = &rzg2l_bias_param_to_hw,
};
@@ -3357,8 +3346,6 @@ static struct rzg2l_pinctrl_data r9a09g047_data = {
.pwpr_pfc_lock_unlock = &rzv2h_pwpr_pfc_lock_unlock,
.pmc_writeb = &rzv2h_pmc_writeb,
.pin_to_oen_bit = &rzg3e_pin_to_oen_bit,
- .oen_read = &rzg2l_read_oen,
- .oen_write = &rzg2l_write_oen,
.hw_to_bias_param = &rzv2h_hw_to_bias_param,
.bias_param_to_hw = &rzv2h_bias_param_to_hw,
};
@@ -3381,8 +3368,6 @@ static struct rzg2l_pinctrl_data r9a09g056_data = {
.pwpr_pfc_lock_unlock = &rzv2h_pwpr_pfc_lock_unlock,
.pmc_writeb = &rzv2h_pmc_writeb,
.pin_to_oen_bit = &rzv2h_pin_to_oen_bit,
- .oen_read = &rzg2l_read_oen,
- .oen_write = &rzg2l_write_oen,
.hw_to_bias_param = &rzv2h_hw_to_bias_param,
.bias_param_to_hw = &rzv2h_bias_param_to_hw,
};
@@ -3406,8 +3391,6 @@ static struct rzg2l_pinctrl_data r9a09g057_data = {
.pwpr_pfc_lock_unlock = &rzv2h_pwpr_pfc_lock_unlock,
.pmc_writeb = &rzv2h_pmc_writeb,
.pin_to_oen_bit = &rzv2h_pin_to_oen_bit,
- .oen_read = &rzg2l_read_oen,
- .oen_write = &rzg2l_write_oen,
.hw_to_bias_param = &rzv2h_hw_to_bias_param,
.bias_param_to_hw = &rzv2h_bias_param_to_hw,
};
--
2.49.0
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