linux-kernel - RE: [PATCH V3 3/3] ufs: ufs-qcom: Enable QUnipro Internal Clock Gating

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Message-ID:
 <PH7PR16MB6196F9B8C676FA18AAC10F3FE549A@PH7PR16MB6196.namprd16.prod.outlook.com>
Date: Wed, 9 Jul 2025 05:16:31 +0000
From: Avri Altman <Avri.Altman@...disk.com>
To: Nitin Rawat <quic_nitirawa@...cinc.com>, "mani@...nel.org"
	<mani@...nel.org>, "James.Bottomley@...senPartnership.com"
	<James.Bottomley@...senPartnership.com>, "martin.petersen@...cle.com"
	<martin.petersen@...cle.com>, "bvanassche@....org" <bvanassche@....org>,
	"avri.altman@....com" <avri.altman@....com>, "ebiggers@...gle.com"
	<ebiggers@...gle.com>, "neil.armstrong@...aro.org"
	<neil.armstrong@...aro.org>, "konrad.dybcio@....qualcomm.com"
	<konrad.dybcio@....qualcomm.com>
CC: "linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-scsi@...r.kernel.org" <linux-scsi@...r.kernel.org>
Subject: RE: [PATCH V3 3/3] ufs: ufs-qcom: Enable QUnipro Internal Clock
 Gating

> Enable internal clock gating for QUnipro by setting the following attributes to 1
> during host controller initialization:
> - DL_VS_CLK_CFG
> - PA_VS_CLK_CFG_REG
> - DME_VS_CORE_CLK_CTRL.DME_HW_CGC_EN
> 
> This change is necessary to support the internal clock gating mechanism in
> Qualcomm UFS host controller. This is power saving feature and hence driver
> can continue to function correctly despite any error in enabling these feature.
Does this change offloads clock gating? 
i.e. no need to set UFSHCD_CAP_CLK_GATING ?

Thanks,
Avri