linux-kernel - Re: [PATCH v2 1/2] dt-bindings: dsp: mediatek: add mt8196 dsp document

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <dff1a4d6d97d7d3d55c4bd409780d2857ae070ca.camel@mediatek.com>
Date: Wed, 9 Jul 2025 06:05:50 +0000
From: Hailong Fan (范海龙) <Hailong.Fan@...iatek.com>
To: "perex@...ex.cz" <perex@...ex.cz>, "krzk@...nel.org" <krzk@...nel.org>,
	"pierre-louis.bossart@...ux.dev" <pierre-louis.bossart@...ux.dev>,
	"kai.vehmanen@...ux.intel.com" <kai.vehmanen@...ux.intel.com>,
	"broonie@...nel.org" <broonie@...nel.org>, "conor+dt@...nel.org"
	<conor+dt@...nel.org>, "tiwai@...e.com" <tiwai@...e.com>, "robh@...nel.org"
	<robh@...nel.org>, "lgirdwood@...il.com" <lgirdwood@...il.com>,
	"yung-chuan.liao@...ux.intel.com" <yung-chuan.liao@...ux.intel.com>,
	"matthias.bgg@...il.com" <matthias.bgg@...il.com>,
	"peter.ujfalusi@...ux.intel.com" <peter.ujfalusi@...ux.intel.com>,
	"krzk+dt@...nel.org" <krzk+dt@...nel.org>, "daniel.baluta@....com"
	<daniel.baluta@....com>, AngeloGioacchino Del Regno
	<angelogioacchino.delregno@...labora.com>,
	"ranjani.sridharan@...ux.intel.com" <ranjani.sridharan@...ux.intel.com>
CC: "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "linux-mediatek@...ts.infradead.org"
	<linux-mediatek@...ts.infradead.org>, "linux-sound@...r.kernel.org"
	<linux-sound@...r.kernel.org>, "sound-open-firmware@...a-project.org"
	<sound-open-firmware@...a-project.org>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, Project_Global_Chrome_Upstream_Group
	<Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: Re: [PATCH v2 1/2] dt-bindings: dsp: mediatek: add mt8196 dsp
 document

On Thu, 2025-07-03 at 12:24 +0200, Krzysztof Kozlowski wrote:
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> 
> 
> On 03/07/2025 11:05, AngeloGioacchino Del Regno wrote:
> > > > +
> > > > +  clocks:
> > > > +    items:
> > > > +      - description: mux for dsp clock
> > > > +      - description: 26M clock
> > > > +      - description: ADSP PLL clock
> > > > +
> > > > +  clock-names:
> > > > +    items:
> > > > +      - const: adsp_sel
> > > 
> > > Isn't this called audiodsp in other bindings?
> > > 
> > > > +      - const: clk26m
> > > 
> > > Don't use frequencies. How is the pin or input called in
> > > datasheet? How
> > > other devices call it?
> > 
> > In the datasheet, this is called.... CLK26M (really).
> > 
> 
> OK, this is a valid argument, however we still try to unify the
> inputs
> so bindings can share such pieces. It is discouraged to have similar
> devices with different bindings in only one place: clk26m -> clk27m
> or
> whatever other number.
> 
> Common is also to name the clock input based on the purpose (like
> bus, ref).
> 
> 
> Best regards,
> Krzysztof

On the MediaTek platform, the main SoC clock sources are typically 32K,
13M, and 26M. This is why the terms clk32k, clk13m, and clk26m are
used.
Specifically, clk26m refers to the system’s 26 MHz clock source.
The clkxxx naming convention is intended to indicate that these are SoC
clock sources, while also distinguishing between different clock
frequencies.
 
Therefore, using other terms could potentially cause confusion.
 
For example, the ADSP clock sources are ADSPPLL(800MHz) and
clk26m(26MHz).
On other platforms, the definition of clk26m in the Device Tree Source
(DTS) is as follows:

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8188.dtsi#n328
The mt8196 platform uses the same design.
 
Best Regards,
Hailong.Fan