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Message-Id: <20250710-audio_drvier-v5-1-d4155f1e7464@amlogic.com>
Date: Thu, 10 Jul 2025 11:35:37 +0800
From: jiebing chen via B4 Relay <devnull+jiebing.chen.amlogic.com@...nel.org>
To: Jerome Brunet <jbrunet@...libre.com>,
Liam Girdwood <lgirdwood@...il.com>, Mark Brown <broonie@...nel.org>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Jaroslav Kysela <perex@...ex.cz>,
Takashi Iwai <tiwai@...e.com>, Neil Armstrong <neil.armstrong@...aro.org>,
Kevin Hilman <khilman@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>
Cc: linux-sound@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-amlogic@...ts.infradead.org, linux-clk@...r.kernel.org,
jian.xu@...ogic.com, shuai.li@...ogic.com, zhe.wang@...ogic.com,
jiebing chen <jiebing.chen@...ogic.com>
Subject: [PATCH v5 1/6] dt-bindings: clock: meson: Add audio power domain
for s4 soc
From: jiebing chen <jiebing.chen@...ogic.com>
The audio power domain has been detected on S4 device.
It must be enabled prior to audio operations.
Signed-off-by: jiebing chen <jiebing.chen@...ogic.com>
---
.../bindings/clock/amlogic,axg-audio-clkc.yaml | 55 +++++++++++++++++++++-
1 file changed, 54 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml
index fd7982dd4ceab82389167079c2258a9acff51a76..c3f0bb9b2ff050394828ba339a7be0c9c48e9a76 100644
--- a/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml
+++ b/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml
@@ -21,6 +21,8 @@ properties:
- amlogic,axg-audio-clkc
- amlogic,g12a-audio-clkc
- amlogic,sm1-audio-clkc
+ - amlogic,s4-audio-clkc
+ - amlogic,clock-pads-clkc
'#clock-cells':
const: 1
@@ -100,13 +102,15 @@ properties:
resets:
description: internal reset line
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- '#clock-cells'
- reg
- clocks
- clock-names
- - resets
allOf:
- if:
@@ -116,12 +120,37 @@ allOf:
enum:
- amlogic,g12a-audio-clkc
- amlogic,sm1-audio-clkc
+ - amlogic,s4-audio-clkc
then:
required:
- '#reset-cells'
else:
properties:
'#reset-cells': false
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - amlogic,s4-audio-clkc
+ then:
+ required:
+ - power-domains
+ else:
+ properties:
+ power-domains: false
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - amlogic,clock-pads-clkc
+ then:
+ properties:
+ resets: false
+ else:
+ required:
+ - resets
additionalProperties: false
@@ -129,6 +158,7 @@ examples:
- |
#include <dt-bindings/clock/axg-clkc.h>
#include <dt-bindings/reset/amlogic,meson-axg-reset.h>
+ #include <dt-bindings/power/meson-s4-power.h>
apb {
#address-cells = <2>;
#size-cells = <2>;
@@ -198,4 +228,27 @@ examples:
"slv_lrclk9";
resets = <&reset RESET_AUDIO>;
};
+ clk_pad: clock-controller@...e80 {
+ compatible = "amlogic,clock-pads-clkc";
+ reg = <0x0 0x330e80 0x0 0x10>;
+ #clock-cells = <1>;
+ clocks = <&clkc_periphs CLKID_AUDIO>,
+ <&clkc_pll CLKID_MPLL0>,
+ <&clkc_pll CLKID_MPLL1>,
+ <&clkc_pll CLKID_MPLL2>,
+ <&clkc_pll CLKID_MPLL3>,
+ <&clkc_pll CLKID_HIFI_PLL>,
+ <&clkc_pll CLKID_FCLK_DIV3>,
+ <&clkc_pll CLKID_FCLK_DIV4>,
+ <&clkc_pll CLKID_FCLK_DIV5>;
+ clock-names = "pclk",
+ "mst_in0",
+ "mst_in1",
+ "mst_in2",
+ "mst_in3",
+ "mst_in4",
+ "mst_in5",
+ "mst_in6",
+ "mst_in7";
+ };
};
--
2.43.0
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