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Message-ID: <202507110637.uCFXqy3U-lkp@intel.com>
Date: Fri, 11 Jul 2025 06:55:17 +0800
From: kernel test robot <lkp@...el.com>
To: ksk4725@...sia.com, Jesper Nilsson <jesper.nilsson@...s.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Chanwoo Choi <cw00.choi@...sung.com>,
Alim Akhtar <alim.akhtar@...sung.com>,
Linus Walleij <linus.walleij@...aro.org>,
Tomasz Figa <tomasz.figa@...il.com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>, Arnd Bergmann <arnd@...db.de>,
Ravi Patel <ravi.patel@...sung.com>,
SungMin Park <smn1196@...sia.com>
Cc: oe-kbuild-all@...ts.linux.dev, kenkim <kenkim@...sia.com>,
Jongshin Park <pjsin865@...sia.com>,
GunWoo Kim <gwk1013@...sia.com>, HaGyeong Kim <hgkim05@...sia.com>,
GyoungBo Min <mingyoungbo@...sia.com>,
Pankaj Dubey <pankaj.dubey@...sung.com>,
Shradha Todi <shradha.t@...sung.com>,
Inbaraj E <inbaraj.e@...sung.com>,
Swathi K S <swathi.ks@...sung.com>,
Hrishikesh <hrishikesh.d@...sung.com>,
Dongjin Yang <dj76.yang@...sung.com>,
Sang Min Kim <hypmean.kim@...sung.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 05/16] clk: samsung: artpec-8: Add clock support for
CMU_CMU block
Hi,
kernel test robot noticed the following build warnings:
[auto build test WARNING on krzk/for-next]
[also build test WARNING on robh/for-next pinctrl-samsung/for-next linus/master v6.16-rc5 next-20250710]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/ksk4725-coasia-com/dt-bindings-clock-Add-CMU-bindings-definitions-for-ARTPEC-8-platform/20250710-082940
base: https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git for-next
patch link: https://lore.kernel.org/r/20250710002047.1573841-6-ksk4725%40coasia.com
patch subject: [PATCH 05/16] clk: samsung: artpec-8: Add clock support for CMU_CMU block
config: loongarch-allyesconfig (https://download.01.org/0day-ci/archive/20250711/202507110637.uCFXqy3U-lkp@intel.com/config)
compiler: clang version 21.0.0git (https://github.com/llvm/llvm-project 01c97b4953e87ae455bd4c41e3de3f0f0f29c61c)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250711/202507110637.uCFXqy3U-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202507110637.uCFXqy3U-lkp@intel.com/
All warnings (new ones prefixed by >>):
>> drivers/clk/samsung/clk-artpec8.c:201:7: warning: unused variable 'mout_clkcmu_fsys_sfmc_p' [-Wunused-const-variable]
201 | PNAME(mout_clkcmu_fsys_sfmc_p) = {
| ^~~~~~~~~~~~~~~~~~~~~~~
1 warning generated.
vim +/mout_clkcmu_fsys_sfmc_p +201 drivers/clk/samsung/clk-artpec8.c
179
180 PNAME(mout_clkcmu_bus_bus_p) = {
181 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
182 "dout_pll_shared1_div3", "dout_pll_shared1_div4" };
183 PNAME(mout_clkcmu_bus_dlp_p) = {
184 "dout_pll_shared0_div2", "dout_pll_shared0_div4",
185 "dout_pll_shared1_div2", "dout_pll_shared1_div4" };
186 PNAME(mout_clkcmu_core_bus_p) = {
187 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
188 "dout_pll_shared0_div4", "dout_pll_shared1_div3" };
189 PNAME(mout_clkcmu_core_dlp_p) = {
190 "dout_pll_shared0_div2", "dout_pll_sahred1_div2",
191 "dout_pll_shared0_div3", "dout_pll_shared1_div3" };
192 PNAME(mout_clkcmu_cpucl_switch_p) = {
193 "dout_pll_shared0_div2", "dout_pll_shared1_div2",
194 "dout_pll_shared0_div3", "dout_pll_shared1_div3" };
195 PNAME(mout_clkcmu_fsys_bus_p) = {
196 "dout_pll_shared1_div2", "dout_pll_shared0_div2",
197 "dout_pll_shared1_div4", "dout_pll_shared1_div3" };
198 PNAME(mout_clkcmu_fsys_ip_p) = {
199 "dout_pll_shared0_div2", "dout_pll_shared1_div3",
200 "dout_pll_shared1_div2", "dout_pll_shared0_div3" };
> 201 PNAME(mout_clkcmu_fsys_sfmc_p) = {
202 "dout_pll_shared1_div3", "dout_pll_shared0_div2",
203 "dout_pll_shared1_div2", "dout_pll_shared0_div3" };
204 PNAME(mout_clkcmu_fsys_scan0_p) = {
205 "dout_pll_shared0_div4", "dout_pll_shared1_div4" };
206 PNAME(mout_clkcmu_fsys_scan1_p) = {
207 "dout_pll_shared0_div4", "dout_pll_shared1_div4" };
208 PNAME(mout_clkcmu_imem_imem_p) = {
209 "dout_pll_shared1_div4", "dout_pll_shared0_div3",
210 "dout_pll_shared1_div3", "dout_pll_shared1_div2" };
211 PNAME(mout_clkcmu_imem_jpeg_p) = {
212 "dout_pll_shared0_div2", "dout_pll_shared0_div3",
213 "dout_pll_shared1_div2", "dout_pll_shared1_div3" };
214 PNAME(mout_clkcmu_cdc_core_p) = {
215 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
216 "dout_pll_shared1_div3", "dout_pll_shared1_div4" };
217 PNAME(mout_clkcmu_dlp_core_p) = {
218 "dout_pll_shared0_div2", "dout_pll_shared1_div2",
219 "dout_pll_shared0_div3", "dout_pll_shared1_div3" };
220 PNAME(mout_clkcmu_3d_p) = {
221 "dout_pll_shared0_div2", "dout_pll_shared1_div2",
222 "dout_pll_shared0_div3", "dout_pll_shared1_div3" };
223 PNAME(mout_clkcmu_2d_p) = {
224 "dout_pll_shared0_div2", "dout_pll_shared1_div2",
225 "dout_pll_shared0_div3", "dout_pll_shared1_div3" };
226 PNAME(mout_clkcmu_mif_switch_p) = {
227 "dout_pll_shared0", "dout_pll_shared1",
228 "dout_pll_shared0_div2", "dout_pll_shared0_div3" };
229 PNAME(mout_clkcmu_mif_busp_p) = {
230 "dout_pll_shared0_div3", "dout_pll_shared1_div4",
231 "dout_pll_shared0_div4", "dout_pll_shared0_div2" };
232 PNAME(mout_clkcmu_peri_disp_p) = {
233 "dout_pll_shared1_div2", "dout_pll_shared0_div2",
234 "dout_pll_shared1_div4", "dout_pll_shared1_div3" };
235 PNAME(mout_clkcmu_peri_ip_p) = {
236 "dout_pll_shared1_div2", "dout_pll_shared0_div4",
237 "dout_pll_shared1_div4", "dout_pll_shared0_div2" };
238 PNAME(mout_clkcmu_rsp_core_p) = {
239 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
240 "dout_pll_shared1_div3", "dout_pll_shared1_div4" };
241 PNAME(mout_clkcmu_trfm_core_p) = {
242 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
243 "dout_pll_shared1_div3", "dout_pll_shared1_div4" };
244 PNAME(mout_clkcmu_vca_ace_p) = {
245 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
246 "dout_pll_shared1_div3", "dout_pll_shared1_div4" };
247 PNAME(mout_clkcmu_vca_od_p) = {
248 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
249 "dout_pll_shared1_div3", "dout_pll_shared1_div4" };
250 PNAME(mout_clkcmu_vio_core_p) = {
251 "dout_pll_shared0_div3", "dout_pll_shared0_div2",
252 "dout_pll_shared1_div2", "dout_pll_shared1_div3" };
253 PNAME(mout_clkcmu_vip0_core_p) = {
254 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
255 "dout_pll_shared1_div3", "dout_pll_shared1_div4" };
256 PNAME(mout_clkcmu_vip1_core_p) = {
257 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
258 "dout_pll_shared1_div3", "dout_pll_shared1_div4" };
259 PNAME(mout_clkcmu_vpp_core_p) = {
260 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
261 "dout_pll_shared1_div3", "dout_pll_shared1_div4" };
262 PNAME(mout_clkcmu_pll_shared0_p) = { "fin_pll", "fout_pll_shared0" };
263 PNAME(mout_clkcmu_pll_shared1_p) = { "fin_pll", "fout_pll_shared1" };
264 PNAME(mout_clkcmu_pll_audio_p) = { "fin_pll", "fout_pll_audio" };
265
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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