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Message-ID: <aG87Vjo5IwTBkp3H@lizhi-Precision-Tower-5810>
Date: Thu, 10 Jul 2025 00:02:30 -0400
From: Frank Li <Frank.li@....com>
To: Karthik Poduval <kpoduval@...126.com>
Cc: jyxiong@...zon.com, miguel.lopes@...opsys.com, anishkmr@...zon.com,
vkoul@...nel.org, kishon@...nel.org, linux-kernel@...r.kernel.org,
linux-phy@...ts.infradead.org, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v2 2/2] phy: dw-dphy-rx: Add dt bindings for Synopsys
MIPI D-PHY RX
On Wed, Jul 09, 2025 at 07:42:21PM -0700, Karthik Poduval wrote:
> Add DT Bindings for Synopsys D-PHY RX, presently tested on version 1.2
>
> Signed-off-by: Karthik Poduval <kpoduval@...126.com>
> ---
> .../bindings/phy/snps,dw-dphy-rx.yaml | 44 +++++++++++++++++++
> MAINTAINERS | 7 +++
> 2 files changed, 51 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.yaml
>
> diff --git a/Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.yaml b/Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.yaml
> new file mode 100644
> index 000000000000..c3c657b1e77d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.yaml
> @@ -0,0 +1,44 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/snps,dw-dphy-rx.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Synopsys Designware MIPI D-PHY RX
> +
> +maintainers:
> + - Karthik Poduval <kpoduval@...126.com>
> + - Jason Xiong <jyxiong@...zon.com>
> + - Miguel Lopes <miguel.lopes@...opsys.com
> +
> +description: |
Needn't |
> + These are the bindings for Synopsys Designware MIPI DPHY RX phy driver.
> + Currently only supported phy version is v1.2.
> +
> +properties:
> + compatible:
> + const: snps,dw-dphy-1p2
> +
> + '#phy-cells':
> + const: 0
> +
> + reg:
> + minItems: 2
> + maxItems: 2
items:
- description: ....
- description: ....
Not all dphy have second register.
> +
> +required:
> + - compatible
> + - '#phy-cells'
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + dw_dphy_rx: dw-dphy@...000040 {
> + compatible = "snps,dw-dphy-1p2";
> + #phy-cells = <0>;
> + reg = <0x0 0x90000040 0x0 0x20>, <0x0 0x90001000 0x0 0x8>;
Some DW MIPI CSI2 test1/test2 register is not tail part of whole MMIO space
such as imx93.
Frank
> + status = "disabled";
> + };
> +
> diff --git a/MAINTAINERS b/MAINTAINERS
> index b5a472a544cf..5fd5a92431bd 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -24217,6 +24217,13 @@ S: Maintained
> F: Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
> F: drivers/dma/dw-axi-dmac/
>
> +SYNOPSYS DESIGNWARE MIPI D-PHY RX DRIVER
> +M: Karthik Poduval <kpoduval@...126.com>
> +M: Jason Xiong <jyxiong@...zon.com>
> +M: Miguel Lopes <miguel.lopes@...opsys.com>
> +S: Supported
> +F: Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.yaml
> +
> SYNOPSYS DESIGNWARE DMAC DRIVER
> M: Viresh Kumar <vireshk@...nel.org>
> R: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> --
> 2.43.0
>
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