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Message-ID: <d6ddb952-ddbc-46a1-a94e-b5191b412036@ti.com>
Date: Thu, 10 Jul 2025 11:57:12 +0530
From: Vignesh Raghavendra <vigneshr@...com>
To: Stefano Radaelli <stefano.radaelli21@...il.com>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: Nishanth Menon <nm@...com>, Tero Kristo <kristo@...nel.org>,
Rob Herring
<robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2 3/3] arm64: dts: ti: var-som-am62p: Add support for
Variscite Symphony Board
On 10/07/25 03:37, Stefano Radaelli wrote:
[...]
> +&main_pmx0 {
> + pinctrl_extcon: main-extcon-pins {
> + pinctrl-single,pins = <
> + AM62PX_IOPAD(0x01a8, PIN_INPUT, 7) /* (F25) MCASP0_AFSX.GPIO1_12 */
> + >;
> + };
> +
> + pinctrl_i2c0: main-i2c0-default-pins {
> + pinctrl-single,pins = <
> + AM62PX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (B25) I2C0_SCL */
> + AM62PX_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (A24) I2C0_SDA */
> + >;
> + };
> +
> + pinctrl_i2c1: main-i2c1-default-pins {
> + pinctrl-single,pins = <
> + AM62PX_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C24) I2C1_SCL */
> + AM62PX_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (B24) I2C1_SDA */
> + >;
> + bootph-all;
> + };
> +
> + pinctrl_mcan0: main-mcan0-default-pins {
> + pinctrl-single,pins = <
> + AM62PX_IOPAD(0x01dc, PIN_INPUT, 0) /* (F20) MCAN0_RX */
> + AM62PX_IOPAD(0x01d8, PIN_OUTPUT, 0) /* (B23) MCAN0_TX */
> + >;
> + };
> +
> + pinctrl_mmc1: main-mmc1-default-pins {
> + pinctrl-single,pins = <
> + AM62PX_IOPAD(0x023c, PIN_INPUT, 0) /* (H20) MMC1_CMD */
> + AM62PX_IOPAD(0x0234, PIN_OUTPUT, 0) /* (J24) MMC1_CLK */
> + AM62PX_IOPAD(0x0230, PIN_INPUT, 0) /* (H21) MMC1_DAT0 */
> + AM62PX_IOPAD(0x022c, PIN_INPUT_PULLUP, 0) /* (H23) MMC1_DAT1 */
> + AM62PX_IOPAD(0x0228, PIN_INPUT_PULLUP, 0) /* (H22) MMC1_DAT2 */
> + AM62PX_IOPAD(0x0224, PIN_INPUT_PULLUP, 0) /* (H25) MMC1_DAT3 */
> + AM62PX_IOPAD(0x0240, PIN_INPUT, 0) /* (D23) MMC1_SDCD */
> + >;
> + bootph-all;
> + };
> +
> + pinctrl_rgmii2: main-rgmii2-default-pins {
> + pinctrl-single,pins = <
> + AM62PX_IOPAD(0x0184, PIN_INPUT, 0) /* (E19) RGMII2_RD0 */
> + AM62PX_IOPAD(0x0188, PIN_INPUT, 0) /* (E16) RGMII2_RD1 */
> + AM62PX_IOPAD(0x018c, PIN_INPUT, 0) /* (E17) RGMII2_RD2 */
> + AM62PX_IOPAD(0x0190, PIN_INPUT, 0) /* (C19) RGMII2_RD3 */
> + AM62PX_IOPAD(0x0180, PIN_INPUT, 0) /* (D19) RGMII2_RXC */
> + AM62PX_IOPAD(0x017c, PIN_INPUT, 0) /* (F19) RGMII2_RX_CTL */
> + AM62PX_IOPAD(0x016c, PIN_INPUT, 0) /* (B19) RGMII2_TD0 */
> + AM62PX_IOPAD(0x0170, PIN_INPUT, 0) /* (A21) RGMII2_TD1 */
> + AM62PX_IOPAD(0x0174, PIN_INPUT, 0) /* (D17) RGMII2_TD2 */
> + AM62PX_IOPAD(0x0178, PIN_INPUT, 0) /* (A19) RGMII2_TD3 */
> + AM62PX_IOPAD(0x0168, PIN_INPUT_PULLDOWN, 0) /* (D16) RGMII2_TXC */
> + AM62PX_IOPAD(0x0164, PIN_INPUT, 0) /* (A20) RGMII2_TX_CTL */
> + >;
> + };
> +
> + pinctrl_spi2: main_spi2-default-pins {
^^^ no underscores please.
> + pinctrl-single,pins = <
> + AM62PX_IOPAD(0x01b0, PIN_INPUT, 1) /* (G20) MCASP0_ACLKR.SPI2_CLK */
> + AM62PX_IOPAD(0x0194, PIN_OUTPUT, 1) /* (D25) MCASP0_AXR3.SPI2_D0 */
> + AM62PX_IOPAD(0x0198, PIN_INPUT, 1) /* (E25) MCASP0_AXR2.SPI2_D1 */
> + AM62PX_IOPAD(0x01ac, PIN_OUTPUT, 7) /* (G23) MCASP0_AFSR.GPIO1_13 */
> + >;
> + };
[...]
--
Regards
Vignesh
https://ti.com/opensource
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