[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <48677b18-3936-464a-a581-26a44ef76c80@kernel.org>
Date: Thu, 10 Jul 2025 09:12:40 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: ksk4725@...sia.com, Jesper Nilsson <jesper.nilsson@...s.com>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Sylwester Nawrocki <s.nawrocki@...sung.com>,
Chanwoo Choi <cw00.choi@...sung.com>, Alim Akhtar <alim.akhtar@...sung.com>,
Linus Walleij <linus.walleij@...aro.org>, Tomasz Figa
<tomasz.figa@...il.com>, Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>, Arnd Bergmann <arnd@...db.de>,
Ravi Patel <ravi.patel@...sung.com>, SungMin Park <smn1196@...sia.com>
Cc: kenkim <kenkim@...sia.com>, Jongshin Park <pjsin865@...sia.com>,
GunWoo Kim <gwk1013@...sia.com>, HaGyeong Kim <hgkim05@...sia.com>,
GyoungBo Min <mingyoungbo@...sia.com>,
Pankaj Dubey <pankaj.dubey@...sung.com>, Shradha Todi
<shradha.t@...sung.com>, Inbaraj E <inbaraj.e@...sung.com>,
Swathi K S <swathi.ks@...sung.com>, Hrishikesh <hrishikesh.d@...sung.com>,
Dongjin Yang <dj76.yang@...sung.com>, Sang Min Kim
<hypmean.kim@...sung.com>, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org,
linux-arm-kernel@...s.com, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-gpio@...r.kernel.org, soc@...ts.linux.dev
Subject: Re: [PATCH 04/16] clk: samsung: artpec-8: Add initial clock support
On 10/07/2025 02:20, ksk4725@...sia.com wrote:
> From: Hakyeong Kim <hgkim05@...sia.com>
>
> Add initial clock support for ARTPEC-8 SoC which is required
> for enabling basic clock management.
>
> Add clock support for below CMU block in ARTPEC-8 SoC:
> - CMU_IMEM
>
> Signed-off-by: Ravi Patel <ravi.patel@...sung.com>
> Signed-off-by: Hakyeong Kim <hgkim05@...sia.com>
> ---
> drivers/clk/samsung/Kconfig | 8 ++++
> drivers/clk/samsung/Makefile | 1 +
> drivers/clk/samsung/clk-artpec8.c | 62 +++++++++++++++++++++++++++++++
> 3 files changed, 71 insertions(+)
> create mode 100644 drivers/clk/samsung/clk-artpec8.c
>
> diff --git a/drivers/clk/samsung/Kconfig b/drivers/clk/samsung/Kconfig
> index 76a494e95027..289591b403ad 100644
> --- a/drivers/clk/samsung/Kconfig
> +++ b/drivers/clk/samsung/Kconfig
> @@ -13,6 +13,7 @@ config COMMON_CLK_SAMSUNG
> select EXYNOS_5420_COMMON_CLK if ARM && SOC_EXYNOS5420
> select EXYNOS_ARM64_COMMON_CLK if ARM64 && ARCH_EXYNOS
> select TESLA_FSD_COMMON_CLK if ARM64 && ARCH_TESLA_FSD
> + select ARTPEC8_COMMON_CLK if ARM64 && ARCH_ARTPEC8
Here and:
>
> config S3C64XX_COMMON_CLK
> bool "Samsung S3C64xx clock controller support" if COMPILE_TEST
> @@ -102,3 +103,10 @@ config TESLA_FSD_COMMON_CLK
> help
> Support for the clock controller present on the Tesla FSD SoC.
> Choose Y here only if you build for this SoC.
> +
> +config ARTPEC8_COMMON_CLK
here, place it before EXYNOS_3250_COMMON_CLK.
> + bool "Axis ARTPEC-8 clock controller support" if COMPILE_TEST
> + depends on COMMON_CLK_SAMSUNG
> + help
Best regards,
Krzysztof
Powered by blists - more mailing lists