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Message-Id: <5494bedb-6907-43dc-8580-04ef1e47c8d0@app.fastmail.com>
Date: Thu, 10 Jul 2025 09:48:10 +0200
From: "Arnd Bergmann" <arnd@...db.de>
To: ksk4725@...sia.com, "Jesper Nilsson" <jesper.nilsson@...s.com>,
 "Michael Turquette" <mturquette@...libre.com>,
 "Stephen Boyd" <sboyd@...nel.org>, "Rob Herring" <robh@...nel.org>,
 "Krzysztof Kozlowski" <krzk+dt@...nel.org>,
 "Conor Dooley" <conor+dt@...nel.org>,
 "Krzysztof Kozlowski" <krzk@...nel.org>,
 "Sylwester Nawrocki" <s.nawrocki@...sung.com>,
 "Chanwoo Choi" <cw00.choi@...sung.com>,
 "Alim Akhtar" <alim.akhtar@...sung.com>,
 "Linus Walleij" <linus.walleij@...aro.org>,
 "Tomasz Figa" <tomasz.figa@...il.com>,
 "Catalin Marinas" <catalin.marinas@....com>, "Will Deacon" <will@...nel.org>,
 "Ravi Patel" <ravi.patel@...sung.com>, "SungMin Park" <smn1196@...sia.com>
Cc: kenkim <kenkim@...sia.com>, "Jongshin Park" <pjsin865@...sia.com>,
 "GunWoo Kim" <gwk1013@...sia.com>, "HaGyeong Kim" <hgkim05@...sia.com>,
 "GyoungBo Min" <mingyoungbo@...sia.com>,
 "Pankaj Dubey" <pankaj.dubey@...sung.com>,
 "Shradha Todi" <shradha.t@...sung.com>, "Inbaraj E" <inbaraj.e@...sung.com>,
 "Swathi K S" <swathi.ks@...sung.com>, Hrishikesh <hrishikesh.d@...sung.com>,
 "Dongjin Yang" <dj76.yang@...sung.com>,
 "Sang Min Kim" <hypmean.kim@...sung.com>, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org,
 linux-arm-kernel@...s.com, linux-clk@...r.kernel.org,
 devicetree@...r.kernel.org,
 "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>, soc@...ts.linux.dev
Subject: Re: [PATCH 14/16] arm64: dts: axis: Add initial device tree support

On Thu, Jul 10, 2025, at 02:20, ksk4725@...sia.com wrote:
> From: sungminpark <smn1196@...sia.com>
>
> Add initial device tree support for Axis ARTPEC-8 SoC and Grizzly board.
> This SoC contains four cores of cortex-a53 CPUs and other various
> peripheral IPs.

> diff --git a/MAINTAINERS b/MAINTAINERS
> index fa1e04e87d1d..371005f3f41a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -2320,6 +2320,20 @@ F:	drivers/crypto/axis
>  F:	drivers/mmc/host/usdhi6rol0.c
>  F:	drivers/pinctrl/pinctrl-artpec*
> 
> +ARM/ARTPEC ARM64 MACHINE SUPPORT
> +M:	Jesper Nilsson <jesper.nilsson@...s.com>
> +M:	Ravi Patel <ravi.patel@...sung.com>
> +M:	SeonGu Kang <ksk4725@...sia.com>
> +M:	SungMin Park <smn1196@...sia.com>
> +L:	linux-arm-kernel@...ts.infradead.org (moderated for non-subscribers)
> +L:	linux-samsung-soc@...r.kernel.org
> +L:	linux-arm-kernel@...s.com
> +S:	Maintained
> +F:	Documentation/devicetree/bindings/clock/axis,artpec*-clock.yaml
> +F:	arch/arm64/boot/dts/axis/
> +F:	drivers/clk/samsung/clk-artpec*.c
> +F:	include/dt-bindings/clock/axis,artpec*-clk.h

I'm trying to understand the SoC family tree here. I see that
you have an entry for ARTPEC SoCs above it, which currently
covers artpec6 (Cortex-A9, apparently not Samsung based).

Is the reason for having two entries here that artpec6/7 and
artpec8/9 are two separate SoC families, or is this just because
they are using 32-bit and 64-bit cores, respectively?

> 
> +config ARCH_ARTPEC
> +	bool "Axis Communications ARTPEC SoC Family"
> +	help
> +	   This enables support for the ARMv8 based ARTPEC SoC Family.
> +
> +config ARCH_ARTPEC8
> +	bool "Axis ARTPEC-8 SoC Platform"
> +	depends on ARCH_ARTPEC
> +	depends on ARCH_EXYNOS
> +	select ARM_GIC
> +	help
> +	  This enables support for the Axis ARTPEC-8 SoC.
> +

I would prefer to be less fine-grained here, especially as
it seems that ARTPEC9 is again quite similar to ARTPEC8, as
far as I can guess from public information.

Could you fold both entries into a single ARCH_ARTPEC?

     Arnd

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