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Message-ID: <8f30092c-0e17-6f4d-f3f1-769508d2f58e@quicinc.com>
Date: Thu, 10 Jul 2025 14:27:41 +0530
From: Dikshita Agarwal <quic_dikshita@...cinc.com>
To: Jorge Ramirez-Ortiz <jorge.ramirez@....qualcomm.com>,
<bryan.odonoghue@...aro.org>, <quic_vgarodia@...cinc.com>,
<krzk+dt@...nel.org>, <konradybcio@...nel.org>, <mchehab@...nel.org>,
<robh@...nel.org>, <conor+dt@...nel.org>, <andersson@...nel.org>,
<amit.kucheria@....qualcomm.com>
CC: <linux-media@...r.kernel.org>, <linux-arm-msm@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v6 6/7] arm64: dts: qcom: qcm2290: Add Venus video node
On 7/8/2025 11:35 PM, Jorge Ramirez-Ortiz wrote:
> Add DT entries for the qcm2290 Venus encoder/decoder.
>
> Co-developed-by: Loic Poulain <loic.poulain@....qualcomm.com>
> Signed-off-by: Loic Poulain <loic.poulain@....qualcomm.com>
> Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez@....qualcomm.com>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/qcm2290.dtsi | 55 +++++++++++++++++++++++++++
> 1 file changed, 55 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
> index f49ac1c1f8a3..7cfacd189a10 100644
> --- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
> @@ -1628,6 +1628,61 @@ adreno_smmu: iommu@...0000 {
> #iommu-cells = <2>;
> };
>
> + venus: video-codec@...0000 {
> + compatible = "qcom,qcm2290-venus";
> + reg = <0 0x5a00000 0 0xf0000>;
> + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> +
> + power-domains = <&gcc GCC_VENUS_GDSC>,
> + <&gcc GCC_VCODEC0_GDSC>,
> + <&rpmpd QCM2290_VDDCX>;
> + power-domain-names = "venus",
> + "vcodec0",
> + "cx";
> + operating-points-v2 = <&venus_opp_table>;
> +
> + clocks = <&gcc GCC_VIDEO_VENUS_CTL_CLK>,
> + <&gcc GCC_VIDEO_AHB_CLK>,
> + <&gcc GCC_VENUS_CTL_AXI_CLK>,
> + <&gcc GCC_VIDEO_THROTTLE_CORE_CLK>,
> + <&gcc GCC_VIDEO_VCODEC0_SYS_CLK>,
> + <&gcc GCC_VCODEC0_AXI_CLK>;
> + clock-names = "core",
> + "iface",
> + "bus",
> + "throttle",
> + "vcodec0_core",
> + "vcodec0_bus";
> +
> + memory-region = <&pil_video_mem>;
> + iommus = <&apps_smmu 0x860 0x0>,
> + <&apps_smmu 0x880 0x0>,
> + <&apps_smmu 0x861 0x04>,
> + <&apps_smmu 0x863 0x0>,
> + <&apps_smmu 0x804 0xe0>;
What’s the rationale behind having five entries here?
could you share the use-cases that justify this configuration?
Thanks,
Dikshita
> +
> + interconnects = <&mmnrt_virt MASTER_VIDEO_P0 RPM_ALWAYS_TAG
> + &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>,
> + <&bimc MASTER_APPSS_PROC RPM_ACTIVE_TAG
> + &config_noc SLAVE_VENUS_CFG RPM_ACTIVE_TAG>;
> + interconnect-names = "video-mem",
> + "cpu-cfg";
> +
> + venus_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-133333333 {
> + opp-hz = /bits/ 64 <133333333>;
> + required-opps = <&rpmpd_opp_low_svs>;
> + };
> +
> + opp-240000000 {
> + opp-hz = /bits/ 64 <240000000>;
> + required-opps = <&rpmpd_opp_svs>;
> + };
> + };
> + };
> +
> mdss: display-subsystem@...0000 {
> compatible = "qcom,qcm2290-mdss";
> reg = <0x0 0x05e00000 0x0 0x1000>;
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