linux-kernel - Re: [PATCH v3 3/4] arm64: dts: qcom: sa8775p: remove aux clock from pcie phy

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Message-ID: <4f963fcc-2b92-4a01-93a4-f0ae942c1b6f@quicinc.com>
Date: Thu, 10 Jul 2025 18:24:57 +0800
From: Ziyue Zhang <quic_ziyuzhan@...cinc.com>
To: Johan Hovold <johan@...nel.org>,
        Konrad Dybcio
	<konrad.dybcio@....qualcomm.com>
CC: <andersson@...nel.org>, <konradybcio@...nel.org>, <robh@...nel.org>,
        <krzk+dt@...nel.org>, <conor+dt@...nel.org>, <jingoohan1@...il.com>,
        <mani@...nel.org>, <lpieralisi@...nel.org>, <kwilczynski@...nel.org>,
        <bhelgaas@...gle.com>, <johan+linaro@...nel.org>, <vkoul@...nel.org>,
        <kishon@...nel.org>, <neil.armstrong@...aro.org>,
        <abel.vesa@...aro.org>, <kw@...ux.com>,
        <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-pci@...r.kernel.org>,
        <linux-phy@...ts.infradead.org>, <qiang.yu@....qualcomm.com>,
        <quic_krichai@...cinc.com>, <quic_vbadigan@...cinc.com>
Subject: Re: [PATCH v3 3/4] arm64: dts: qcom: sa8775p: remove aux clock from
 pcie phy


On 7/10/2025 5:43 PM, Johan Hovold wrote:
> On Fri, Jun 27, 2025 at 04:50:57PM +0200, Konrad Dybcio wrote:
>> On 6/25/25 11:00 AM, Ziyue Zhang wrote:
>>> gcc_aux_clk is used in PCIe RC and it is not required in pcie phy, in
>>> pcie phy it should be gcc_phy_aux_clk, so remove gcc_aux_clk and
>>> replace it with gcc_phy_aux_clk.
>> GCC_PCIE_n_PHY_AUX_CLK is a downstream of the PHY's output..
>> are you sure the PHY should be **consuming** it too?
> Could we get a reply here, please?
>
> A bunch of Qualcomm SoCs in mainline do exactly this currently even
> though it may not be correct (and some downstream dts do not use these
> clocks).
>
> Johan

Hi Johan

After reviewing the downstream platforms, it seems that GCC_PCIE_n_PHY_AUX_CLK
is generally needed. Would you mind letting us know if there are any platforms
where this clock is not required?