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Message-ID: <3592348.tdWV9SEqCh@phil>
Date: Thu, 10 Jul 2025 13:21:19 +0200
From: Heiko Stuebner <heiko@...ech.de>
To: Alexey Charkov <alchark@...il.com>,
 "Rafael J. Wysocki" <rafael@...nel.org>,
 Daniel Lezcano <daniel.lezcano@...aro.org>, Zhang Rui <rui.zhang@...el.com>,
 Lukasz Luba <lukasz.luba@....com>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
 Jonas Karlman <jonas@...boo.se>,
 Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
Cc: Sebastian Reichel <sebastian.reichel@...labora.com>, kernel@...labora.com,
 linux-pm@...r.kernel.org, devicetree@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
 linux-kernel@...r.kernel.org,
 Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
Subject:
 Re: [PATCH v6 4/7] dt-bindings: thermal: rockchip: document otp thermal trim

Am Dienstag, 10. Juni 2025, 14:32:40 Mitteleuropäische Sommerzeit schrieb Nicolas Frattaroli:
> Several Rockchip SoCs, such as the RK3576, can store calibration trim
> data for thermal sensors in OTP cells. This capability should be
> documented.
> 
> Such a rockchip thermal sensor may reference cell handles that store
> both a chip-wide trim for all the sensors, as well as cell handles
> for each individual sensor channel pointing to that specific sensor's
> trim value.
> 
> Additionally, the thermal sensor may optionally reference cells which
> store the base in terms of degrees celsius and decicelsius that the trim
> is relative to.
> 
> Each SoC that implements this appears to have a slightly different
> combination of chip-wide trim, base, base fractional part and
> per-channel trim, so which ones do which is documented in the bindings.
> 
> Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>

Acked-by: Heiko Stuebner <heiko@...ech.de>

with one question below

> ---
>  .../bindings/thermal/rockchip-thermal.yaml         | 61 ++++++++++++++++++++++
>  1 file changed, 61 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml
> index 49ceed68c92ce5a32ed8d4f39bd88fd052de0e80..573f447cc26ed7100638277598b0e745d436fd01 100644
> --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml
> +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml
> @@ -40,6 +40,17 @@ properties:
>        - const: tsadc
>        - const: apb_pclk
>  
> +  nvmem-cells:
> +    items:
> +      - description: cell handle to where the trim's base temperature is stored
> +      - description:
> +          cell handle to where the trim's tenths of Celsius base value is stored
> +
> +  nvmem-cell-names:
> +    items:
> +      - const: trim_base
> +      - const: trim_base_frac
> +

are we sure, we want underscores here?
trim-base, trim-base-frac looks somewhat nicer.

Heiko



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